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24AA256UID

256K I2C Serial EEPROM with EUI-48™, EUI-64™ and Unique 32-Bit Serial Number

Microchip Technology 

6.0 WRITE OPERATIONS

6.1 Byte Write

Following the Start condition from the master, the

control code (four bits), the Chip Select (three bits) and

the R/W bit (which is a logic low) are clocked onto the

bus by the master transmitter. This indicates to the

addressed slave receiver that the address high byte will

follow after it has generated an Acknowledge bit during

the ninth clock cycle. Therefore, the next byte

transmitted by the master is the high-order byte of the

word address and will be written into the Address

Pointer of the 24AA256UID. The next byte is the Least

Significant Address Byte. After receiving another

Acknowledge signal from the 24AA256UID, the master

device will transmit the data word to be written into the

addressed memory location. The 24AA256UID

acknowledges again and the master generates a Stop

condition. This initiates the internal write cycle and

during this time, the 24AA256UID will not generate

Acknowledge signals (Figure 6-1).

Note:

When doing a write of less than 64 bytes,

the data in the rest of the page is

refreshed along with the data bytes being

written. This will force the entire page to

endure a write cycle, and for this reason

endurance is specified per page.

6.2 Page Write

The write control byte, word address and the first data

byte are transmitted to the 24AA256UID in much the

same way as in a byte write. The exception is that

instead of generating a Stop condition, the master

transmits up to 63 additional bytes, which are

temporarily stored in the on-chip page buffer, and will

be written into memory once the master has

transmitted a Stop condition. Upon receipt of each

word, the six lower Address Pointer bits are internally

incremented by one. If the master should transmit more

than 64 bytes prior to generating the Stop condition, the

address counter will roll over and the previously

received data will be overwritten. As with the byte write

operation, once the Stop condition is received, an

internal write cycle will begin (Figure 6-2).

24AA256UID

6.3 Write Protection

The upper eighth of the array (7000h-7FFFh) is

permanently write-protected. Write operations to this

address range are inhibited. Read operations are not

affected.

The remainder of the array (0000h-6FFFh) can be

written to and read from normally.

Note:

Page write operations are limited to

writing bytes within a single physical page,

regardless of the number of bytes

actually being written. Physical page

boundaries start at addresses that are

integer multiples of the page buffer size

(or ‘page size’) and end at addresses that

are integer multiples of [page size – 1]. If

a Page Write command attempts to write

across a physical page boundary, the

result is that the data wraps around to the

beginning of the current page (overwriting

data previously stored there), instead of

being written to the next page, as might be

expected. It is, therefore, necessary for

the application software to prevent page

write operations that would attempt to

cross a page boundary.

 2013-2016 Microchip Technology Inc.

DS20005215C-page 9

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