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24AA256UID Просмотр технического описания (PDF) - Microchip Technology

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24AA256UID Datasheet PDF : 30 Pages
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24AA256UID
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
Name
A0
A1
A2
VSS
SDA
SCL
NC
VCC
PIN FUNCTION TABLE
8-pin
PDIP
8-pin
SOIC
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
8-pin
TSSOP
1
2
3
4
5
6
7
8
Function
User Configurable Chip Select
User Configurable Chip Select
User Configurable Chip Select
Ground
Serial Data
Serial Clock
Not Connected
+1.7V to 5.5V
2.1 A0, A1, A2 Chip Address Inputs
The A0, A1 and A2 inputs are used by the 24AA256UID
for multiple device operations. The levels on these
inputs are compared with the corresponding bits in the
slave address. The chip is selected if the compare is
true.
Up to eight devices may be connected to the same bus
by using different Chip Select bit combinations. These
inputs must be connected to either VCC or VSS.
In most applications, the chip address inputs A0, A1
and A2 are hard-wired to logic ‘0’ or logic ‘1’. For
applications in which these pins are controlled by a
microcontroller or other programmable device, the chip
address pins must be driven to logic ‘0’ or logic ‘1
before normal device operation can proceed.
2.2 Serial Data (SDA)
This is a bidirectional pin used to transfer addresses
and data into and out of the device. It is an open-drain
terminal. Therefore, the SDA bus requires a pull-up
resistor to VCC (typical 10 kfor 100 kHz, 2 kfor
400 kHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
2.3 Serial Clock (SCL)
This input is used to synchronize the data transfer to
and from the device.
2013-2016 Microchip Technology Inc.
DS20005215C-page 5

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