BF1102 Просмотр технического описания (PDF) - NXP Semiconductors.
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BF1102 Datasheet PDF : 14 Pages
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NXP Semiconductors
Dual N-channel dual gate MOS-FETs
Product specification
BF1102; BF1102R
40
handbook, halfpage
I G1
(μA)
30
20
10
MGS368
VG1-S = 5 V
4.5 V
4V
3.5 V
3V
0
0
2
4 VG2-S (V) 6
VDS = 5 V; Tj = 25 C.
RG1 = 120 k (connected to VGG); see Fig.20.
Fig.11 Gate 1 current as a function of gate 2
voltage; typical values.
0
handgbaoionk, halfpage
reduction
(dB)
−10
MCD968
−20
−30
−40
−50
0
1
2
3
4
VAGC (V)
VDS = 5 V; VGG = 5 V; f = 50 MHz; Tamb = 25 C;
RG1 = 120 k (connected to VGG); see Fig.20.
Fig.12 Typical gain reduction as a function of the
AGC voltage; see Fig.20.
120
handbook, halfpage
Vunw
(dB μV)
110
MGS369
100
90
80
0
20
40
60
gain reduction (dB)
VDS = 5 V; VGG = 5 V; fw = 50 MHz; funw = 60 MHz; Tamb = 25 C;
RG1 = 120 k (connected to VGG); see Fig.20.
Fig.13 Unwanted voltage for 1% cross-modulation
as a function of gain reduction;
typical values.
20
handbook, halfpage
ID
(mA)
16
MCD969
12
8
4
0
0
10
20
30
40
50
gain reduction (dB)
VDS = 5 V; VGG = 5 V; f = 50 MHz; Tamb = 25 C;
RG1 = 120 k (connected to VGG); see Fig.20.
Fig.14 Drain current as a function of gain
reduction; typical values.
2000 Apr 11
7
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