S82595FX Просмотр технического описания (PDF) - Intel

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S82595FX

ISA BUS HIGH INTEGRATION ETHERNET CONTROLLER

Intel 

82595FX

4 1 1 IO BANK 0

The format for IO Bank 0 is shown below

7

6

POINTER

RCV

States

(Counter)

0

Resvrd

0

Resvrd

5

4

3

2

1

0

ABORT

COMMAND OP CODE

EXEC

States

EXEC

INT

ID REGISTER

1

(Auto En)

0

Cur

Base

32 IO

HAR

EXEC

Mask

RCV CAR BAR

(Low)

RCV CAR BAR

(High)

RCV STOP REG

(Low)

RCV STOP REG

(High)

TX

INT

1

TX

Mask

RX

RX STP

INT

INT

0

0

RESERVED

RX

Mask

RX STP

Mask

Reg 0

(CMD

Reg)

Reg 1

Reg 2

Reg 3

Reg 4

Reg 5

Reg 6

Reg 7

RCV Copy Threshold REG

Reg 8

EARLY XMT THRESHOLD REGISTER (XTR)

XMT CAR BAR

(Low)

XMT CAR BAR

(High)

Host Address Reg (Low)

32-Bit I O (Byte 0)

Host Address Reg (High)

32-Bit I O (Byte 1)

Local Memory I O Port (Low)

32-Bit I O (Byte 2)

Local Memory I O Port (High)

32-Bit I O (Byte 3)

Reg 9

Reg 10

Reg 11

Reg 12

Reg 13

Reg 14

Reg 15

15

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