PC82545GM867806 Просмотр технического описания (PDF) - Intel

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производитель

PC82545GM867806

Gigabit Ethernet Controller

Intel 

4.0

4.1

Networking Silicon — 82545GM

Test Port Functionality

XOR Testing

A common board or system-level manufacturing test for proper electrical continuity between a

silicon component and the board is some type of cascaded-XOR or NAND tree test. The

82545GM implements an XOR tree spanning most I/O signals. The component XOR tree consists

of a series of cascaded XOR logic gates, each stage feeding in the electrical value from a unique

pin. The output of the final stage of the tree is visible on an output pin from the component.

Figure 2. XOR Tree Concept

By connecting to a set of test-points or bed-of-nails fixture, a manufacturing test fixture can test

connectivity to each of the component pins included in the tree by sequentially testing each pin,

testing each pin when driven both high and low, and observing the output of the tree for the

expected signal value and/or change.

4.1.1

XOR Tree Control and Operation

The following signals are required to place the 82545GM in XOR tree test mode:

Test

Function/

Mode

Pin Name

Dual-Mode

Name

XOR Tree

Test

TEST_DM_N

EWRAP

TEST_

MODE[3]

0

0

CLK_BYP_N CLK_VIEW SDP_B[7]

TEST_

MODE[2]

0

TEST_

MODE[1]

0

TEST_

MODE[0]

0

Datasheet

19

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