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MF0ICU1001W(2010) Просмотр технического описания (PDF) - NXP Semiconductors.

Номер в каталоге
Компоненты Описание
производитель
MF0ICU1001W
(Rev.:2010)
NXP
NXP Semiconductors. NXP
MF0ICU1001W Datasheet PDF : 28 Pages
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NXP Semiconductors
MF0ICU1
MIFARE Ultralight contactless single-ticket IC
8.2.5 Halt state
The halt and idle states constitute the second wait state implemented in the MF0ICU1. An
already processed MF0ICU1 can be set into the halt state using the HALT command. In
the anticollision phase, this state helps the PCD to distinguish between processed cards
and cards yet to be selected. The MF0ICU1 can only exit this state on execution of the
WUPA command. Any other data received when the device is in this state is interpreted as
an error and the MF0ICU1 state is unchanged. Refer to the document MIFARE collection
of currently available application notes for correct implementation of an anticollision
procedure based on the idle and halt states and the REQA and WUPA commands.
8.3 Data integrity
Reliable data transmission is ensured over the contactless communication link between
PCD and MF0ICU1 as follows:
16-bit CRC for each block
Parity bits for each byte
Bit count checking
Bit coding to distinguish between logic 1, logic 0 and no information
Channel monitoring (protocol sequence and bit stream analysis)
8.4 RF interface
The RF interface is base on the ISO/IEC 14443 A standard for contactless smart cards.
The RF field from the PCD is always present as it is used for the card power supply.
However, it is sequentially interrupted during data transmission to allow the data to be
sent. There is only one start bit at the beginning of each frame for data communication
irrespective of direction. Each byte is transmitted with an odd parity bit at the end of the
byte. The LSB of the byte with the lowest selected block address is transmitted first. The
maximum frame length is 163-bit:
(16 data bytes + 2 CRC bytes = 16 * 9 + 2 * 9 + 1 start bit = 163).
MF0ICU1
Product data sheet
PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.8 — 22 December 2010
028638
© NXP B.V. 2010. All rights reserved.
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