L6402ML11RI Просмотр технического описания (PDF) - Advanced Micro Devices

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L6402ML11RI

128 Megabit (4 M x 32-Bit/8 M x 16-Bit) MirrorBit™ 3.0 Volt-only Uniform Sector Flash Memory with Versatile I/O™ Control

Advanced Micro Devices 

PIN CONFIGURATION

A–1

= Least significant address bit for the 16-bit

data bus, and selects between the high

and low word. A –1 is not used for the

32-bit mode (WORD# = VIH).

A21–A0

= 22-bit address bus for 128 Mb device.

DQ31–DQ0 = 32-bit data inputs/outputs/float

WORD#

= Selects 16-bit or 32-bit mode. When

WORD# = VIH, data is output on

DQ31–DQ0. When WORD# = VIL, data is

output on DQ15–DQ0.

CE#

= Chip Enable Input.

OE#

= Output Enable Input.

WE#

= Write enable.

VSS

RY/BY#

= Device ground

= Ready/Busy output and open drain. When

RY/BY# = VOH, the device is ready to ac-

cept read operations and commands.

When RY/BY# = VOL, the device is either

executing an embedded algorithm or the

device is executing a hardware reset oper-

ation.

WP#/ACC

VCC

RESET#

NC

= Write Protect input/Acceleration input.

= Power Supply (2.7 V to 3.6 V)

= Hardware reset input

= Pin not connected internally

LOGIC SYMBOLS

x16 Mode

23

A21 to A-1

16

DQ15–DQ0

CE#

OE#

WE#

WP#/ACC

RESET#

WP#

WORD#

VIO

RY/BY#

x32 Mode

22

A21–A0

32

DQ31–DQ0

CE#

OE#

WE#

WP#/ACC

RESET#

WP#

WORD#

VIO

RY/BY#

Note:In x16 mode, DQ31 and DQ23 must be connected to each other on the board.

January 23, 2006

Am29LV6402M

7

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