M4-96/64-18YC Просмотр технического описания (PDF) - Lattice Semiconductor
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M4-96/64-18YC Datasheet PDF : 46 Pages
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Block CLK0
GCLK0
GCLK1
GCLK0
GCLK1
X
X
X
X
Table 12. PAL Block Clock Combinations1
Block CLK1
Block CLK2
GCLK1
GCLK1
GCLK0
GCLK0
X
X
X
X
X
X
X
X
GCLK2 (GCLK0)
GCLK3 (GCLK1)
GCLK2 (GCLK0)
GCLK3 (GCLK1)
Note:
1. Values in parentheses are for the M4(LV)-32/32 and M4(LV)-64/32.
Block CLK3
X
X
X
X
GCLK3 (GCLK1)
GCLK3 (GCLK1)
GCLK2 (GCLK0)
GCLK2 (GCLK0)
This feature provides high flexibility for partitioning state machines and dual-phase clocks. It
also allows latches to be driven with either polarity of latch enable, and in a master-slave
configuration.
18
MACH 4 Family
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