ISL88705 Просмотр технического описания (PDF) - Intersil

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ISL88705

µP Supervisor with Watchdog Timer, Power-Fail Comparator, Manual Reset and Adjustable Power-On Reset

Intersil 

ISL88705, ISL88706, ISL88707, ISL88708, ISL88716, ISL88813

Bipolar Voltage Sensing

Any of the ISL88705, ISL88706, ISL88707, ISL88708,

ISL88716, ISL88813 devices can be used to sense and

report the presence of both a positive and negative voltage

via the PFI and PFO, as shown in Figure 16. The VDD

monitors the positive voltage as normal and the PFI monitors

the presence of the negative supply. As the differential

voltage across the R1, R2 divider is increased, the resistor

values must be chosen such that the PFI node is <1.25V

when the -V supply is satisfactory and the positive supply is

at its maximum specified value. This allows the positive

supply to fluctuate within its acceptable range without

signaling a reset. Driving the MR with the inverted PFO

signal as shown provides for reset generation when -V is not

satisfactorily present. Reset will remain asserted as long as

PFO is high.

+5V

R1

VDD

MR

100k

100k

PFI

PFO

2N3904

R2

Special Application Considerations

Using good decoupling practices will prevent transients

(i.e., due to switching noises and short duration droops in the

supply voltage) from causing unwanted resets.

When using the CPOR pin, avoid stray capacitance during

layout as much as possible in order to minimize its effect on

the tPOR timing.

If using a voltage resistor divider on the PFI input to critique

an external voltage and intending to use the MR input to

initiate resets then avoid having the PFI voltage less than

PFI Vth +2.2V as unintended PFO transition may occur

when MR is transitioning high.

RST

-5V

ISL8870x, ISL88716, ISL88813

RESET

V+

V-

FIGURE 16. ±5V MONITORING

12

FN8092.5

January 12, 2009

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