MAT02 Просмотр технического описания (PDF) - Analog Devices

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MAT02

Low Noise, Matched Dual Monolithic Transistor

Analog Devices 

MAT02

Figure 20. Compensation of Bulk Resistance Error

Extrinsic resistive terms and the early effect cause departure

from the ideal logarithmic relationship. For small VCB, all of

these effects can be lumped together as a total effective bulk re-

sistance rBE. The rBEIC term causes departure from the desired

logarithmic relationship. The rBE term for the MAT02 is less

than 0.5 Ω and ∆rBE between the two sides is negligible.

Returning to the multiplier/divider circuit of Figure 1 and using

Equation (4):

VBE1A + VBE2A – VBE2B –VBE1B + (I1 + I2 – IO – I3) rBE = 0

If the transistor pairs are held to the same temperature, then:

kT

q

In

I1I2

I3IO

=

kT

q

In

I

I

S1AI

S1B I

S2A

S2B

+

(I1

+

I2

–

IO

–

I3)

rBE

(6)

If all the terms on the right-hand side were zero, then we would

have In (I1 I2/I3 IO) equal to zero which would lead directly to

the desired result:

IO

=

I1I2

I3

,

where

I1,

I2, I3,

IO

>0

(7)

Note that this relationship is temperature independent. The

right-hand side of Equation (6) is near zero and the output cur-

rent IO will be approximately I1 I2/I3. To estimate error, define ø

as the right-hand side terms of Equation (6):

ø = In

IS1AIS2A + q

IS1BIS2B kT

(I1 + I2 – IO – I3) rBE

(8)

For the MAT02, In (ISA/ISB) and ICrBE are very small. For small

ø, εØ ~ 1 + ø and therefore:

I1I2

I3IO

=1+ø

(9)

IO ~

I1I2

I3

(1 – ø)

The In (ISA/ISB) terms in ø cause a fixed gain error of less than

± 0.6% from each pair when using the MAT02, and this gain

error is easily trimmed out by varying RO. The ICrBE terms are

more troublesome because they vary with signal levels and

are multiplied by absolute temperature. At 25°C, kT/q is

approximately 26 mV and the error due to an rBEIC term will be

rBEIC/26 mV. Using an rBE of 0.4 Ω for the MAT02 and assum-

ing a collector current range of up to 200 µA, then a peak error

of 0.3% could be expected for an rBEIC error term when using

the MAT02. Total error is dependent on the specific application

configuration (multiply, divide, square, etc.) and the required

dynamic range. An obvious way to reduce ICrBE error is to re-

duce the maximum collector current, but then op amp offsets

and leakage currents become a limiting factor at low input lev-

els. A design range of no greater than 10 µA to 1 mA is generally

recommended for most nonlinear function circuits.

A powerful technique for reducing error due to ICrBE is shown in

Figure 20. A small voltage equal to ICrBE is applied to the tran-

sistor base. For this circuit:

VB =

RC

R2

V1 and ICrBE =

r BE

R1

V1

(10)

The error from rBEIC is cancelled if RC/R2 is made equal to rBE/

R1. Since the MAT02 bulk resistance is approximately 0.39 Ω,

an RC of 3.9 Ω and R2 of 10 R1 will give good error cancellation.

In more complex circuits, such as the circuit in Figure 19, it

may be inconvenient to apply a compensation voltage to each

individual base. A better approach is to sum all compensation to

the bases of Q1. The “A” side needs a base voltage of (VO/RO +

VZ/R3) rBE and the “B” side needs a base voltage of (VX/R1+VY/

R2) rBE. Linearity of better than ± 0.1% is readily achievable with

this compensation technique.

Operational amplifier offsets are another source of error. In Fig-

ure 20, the input offset voltage and input bias current will cause

an error in collector current of (VOS/R1) + IB. A low offset op

amp, such as the OP07 with less than 75 µV of VOS and IB of

less than ± 3 nA, is recommended. The OP22/OP32, a program-

mable micropower op amp, should be considered if low power

consumption or single-supply operation is needed. The value of

frequency-compensating capacitor (CO) is dependent on the op

amp frequency response and peak collector current. Typical val-

ues for CO range from 30 pF to 300 pF.

...

FOUR-QUADRANT MULTIPLIER

A simplified schematic for a four-quadrant log/antilog multiplier

is shown in Figure 21. As with the previously discussed one-

quadrant multiplier, the circuit makes IO = I1 I2/I3. The two

input currents, I1 and I2, are each offset in the positive direction.

This positive offset is then subtracted out at the output stage.

Assuming ideal op amps, the currents are:

I1

=

VX

R1

+

VR

R2

,

I2

=VY

R1

+VR

R2

(11)

IO

=VX

R1

+VY

R1

+VR

R2

+

VO

RO

,

I

3

=VR

R2

From IO = I1 I2/I3, the output voltage will be:

RO R2 V XVY

VO = R12 V R

(12)

REV. C

–9–

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