MU9C2481L-10DC Просмотр технического описания (PDF) - MUSIC Semiconductors

Номер в каталоге

Компоненты Описание

производитель

MU9C2481L-10DC

LANCAM® 1ST Family

MUSIC Semiconductors 

LANCAM 1ST Family

GENERAL DESCRIPTION

The LANCAM 1ST family consists of high density content-

addressable memories (CAMs) in a variety of depths. Like the

other LANCAM series from MUSIC Semiconductors, the

LANCAM 1ST is ideal for time critical applications requiring

intensive list processing.

Content-addressable memories, also known as associative

memories, operate in the converse way to random access

memories (RAM). In RAM, the input to the device is an address

and the output is the data stored at that address. In CAM, the

input is a data sample and the output is a flag to indicate a

match and the address of the matching data. As a result, CAM

searches large databases for matching data in a short, constant

time period, no matter how many entries are in the database.

The ability to search data words up to 64 bits wide allows large

address spaces to be searched rapidly and efficiently. A

patented architecture links each CAM entry to associated data

and makes this data available for use after a successful

compare operation.

The MUSIC LANCAM 1ST is ideal for address filtering and

translation applications in LAN switches and routers. The

LANCAM 1ST is also well suited to encryption, data caches,

and branch tables.

OPERATIONAL OVERVIEW

To use the LANCAM 1ST, the user loads the data into the

Comparand register, which is automatically compared to all

valid CAM locations. The device then indicates whether

or not one or more of the valid CAM locations contains

data that match the target data. The status of each CAM

location is determined by two validity bits at each memory

location. The two bits are encoded to render four validity

conditions: Valid, Skip, Empty, and Random Access, as

shown in Table 1. The memory can be partitioned into CAM

and associated RAM segments on 16-bit boundaries, but

by using one of the two available mask registers, the

CAM/RAM partitioning can be set at any arbitrary size

between zero and 64 bits.

The LANCAM 1ST’s internal data path is 64 bits wide for

rapid internal comparison and data movement. Loading data

to the Control, Comparand, and mask registers

automatically triggers a compare. Compares may also be

initiated by a command to the device. Associated RAM

data is available immediately after a successful compare

operation. The Status register reports the results of

compares including all flags and addresses. Two Mask

registers are available and can be used in two different

ways: to mask comparisons or to mask data writes. The

random access validity type allows additional masks to

be stored in the CAM array where they may be retrieved rapidly.

A simple three-wire control interface and commands

loaded into the Instruction decoder control the device.

A powerful instruction set increases the control flexibility

and minimizes software overhead. These and other

features make the LANCAM 1ST a powerful associative

memory that drastically reduces search delays.

Skip Bit

0

0

1

1

Empty Bit

0

1

0

1

Entry Type

Valid

Empty

Skip

RAM

Table 1: Entry Types vs. Validity Bits

/W

LOW

LOW

HIGH

HIGH

Rev. 1a

/CM

Cycle Type

LOW

Command Write Cycle

HIGH

Data Write Cycle

LOW

Command Read Cycle

HIGH

Data Read Cycle

Table 2: I/O Cycles

2

G ND 7

DQ4 8

DQ5 9

V CC 10

V CC 11

TEST 2 12

G ND 13

G ND 14

D Q6 15

D Q7 16

V CC 17

44-pin PL CC

(Top View )

39 NC

38 /MF

37 V CC

36 G ND

35 /R

34 V CC

33 V CC

32 TEST 1

31 /E

30 /W

29 G ND

Pinout Diagram

Share Link: