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MAX1720 Просмотр технического описания (PDF) - ON Semiconductor

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MAX1720 Datasheet PDF : 18 Pages
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MAX1720
1
6
OSC
Vin
+2
5
C3
3
4
−Vout
+C2
RL
+
C1
C1 = C2 = C3 = 10 mF
Figure 14. Test Setup/Voltage Inverter
DETAILED OPERATING DESCRIPTION
The MAX1720 charge pump converter inverts the voltage
applied to the Vin pin. Conversion consists of a two−phase
operation (Figure 15). During the first phase, switches S2 and
S4 are open and S1 and S3 are closed. During this time, C1
charges to the voltage on Vin and load current is supplied from
C2. During the second phase, S2 and S4 are closed, and S1 and
S3 are open. This action connects C1 across C2, restoring
charge to C2.
S1
S2
Vin
C1
S3
From Osc
C2
S4
−Vout
Figure 15. Ideal Switched Capacitor Charge Pump
APPLICATIONS INFORMATION
Output Voltage Considerations
The MAX1720 performs voltage conversion but does not
provide regulation. The output voltage will drop in a linear
manner with respect to load current. The value of this
equivalent output resistance is approximately 26 W nominal
at 25°C with Vin = 5.0 V. Vout is approximately −5.0 V at light
loads, and drops according to the equation below:
VDROP + Iout Rout
Vout + * (Vin * VDROP)
Charge Pump Efficiency
The overall power conversion efficiency of the charge
pump is affected by four factors:
1. Losses from power consumed by the internal
oscillator, switch drive, etc. (which vary with input
voltage, temperature and oscillator frequency).
2. I2R losses due to the on−resistance of the MOSFET
switches on−board the charge pump.
3. Charge pump capacitor losses due to Equivalent
Series Resistance (ESR).
4. Losses that occur during charge transfer from the
commutation capacitor to the output capacitor when
a voltage difference between the two capacitors
exists.
Most of the conversion losses are due to factors 2, 3 and 4.
These losses are given by Equation 1.
PLOSS(2,3,4) + Iout 2 Rout ^ Iout 2
ƪ ƫ 1
(fOSC)C1
)
8RSWITCH
)
4ESRC1
)
ESRC2
(eq. 1)
The 1/(fOSC)(C1) term in Equation 1 is the effective output
resistance of an ideal switched capacitor circuit (Figures 16
and 17).
The losses due to charge transfer above are also shown in
Equation 2. The output voltage ripple is given by Equation 3.
PLOSS + [ 0.5C 1 (Vin2 * Vout2)
) 0.5C2 (VRIPPLE2 * 2VoutVRIPPLE)]
fOSC
(eq. 2)
VRIPPLE
+
Iout
(fOSC)(C2)
)
2(Iout)(ESRC2)
(eq.
3)
f
Vin
Vout
C1
C2
RL
Figure 16. Ideal Switched Capacitor Model
REQUIV
Vin
REQUIV + f
1
C1
Vout
C2
RL
Figure 17. Equivalent Output Resistance
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