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M65617 Просмотр технического описания (PDF) - MITSUBISHI ELECTRIC

Номер в каталоге
Компоненты Описание
производитель
M65617
Mitsubishi
MITSUBISHI ELECTRIC  Mitsubishi
M65617 Datasheet PDF : 15 Pages
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MITSUBISHI ICs (TV)
M65617SP
PICTURE-IN-PICTURE SIGNAL PROCESSING
SERIAL REGISTER INFORMATION (device address=24h, subaddress=10h to 1Bh)
(Device adress=25h [output], subaddress=1Ch to 1Fh
Indication method of reading column: 0 or 1.... Register with readings
.... Register unused
Sub-
address
10h
11h
12h
Bit No.
0
1
2
3
4
5
6
7
0
1
2
3
4
5
Reference
setting
Register name
0
bg-start (0)
1
bg-start (1)
1
bg-start (2)
1
bg-start (3)
0
bg-start (4)
0
bg-start (5)
1
swap
0
set-pd-out
0
no-bst-level (0)
0
no-bst-level (1)
0
bw-level (0)
0
bw-level (1)
0
ext-mh-sel (0)
0
ext-mh-sel (1)
6
0
ext-mv-sel
7
1
pin28osel
0
0
color-set (0)
1
0
color-set (1)
2
0
color-set (2)
3
0
color-set (3)
4
0
color-set (4)
5
0
color-set (5)
6
1
color-set (6)
7
NB test-pip-c-dac-ctrl
0
1
bgpx (0)
1
0
bgpx (1)
2
1
bgpx (2)
3
1
bgpx (3)
13h
4
1
bgpx (4)
5
0
bgpx (5)
6
0
test-sel180d
7
0
ti-sel180d
0
1
color2 (0)
1
1
color2 (1)
2
1
color2 (2)
3
1
color2 (3)
14h
4
1
color2 (4)
5
1
color2 (5)
6
1
dft-wtg
7
0
teg-vbrin
Function
Setting of burst gate pulse phase for internal burst lock;
Min.value [0], max.value [63],70ns/step
[0Eh setting]
(4.8us, pulse width 3us from the front end of horizontal sync)
chg, dis output transfer control; default/reversal [0/1], [1 setting]
For testing [0 setting]
For testing [0 setting]
For testing [0 setting]
Selection of main horizontal sync signal input; [normally 0 setting]
HD pin[0 or 1], VD-CSYNC pin[2], internal analog [3]
election of main vertical sync signal input; VD-CSYNC pin/internal analog [0/1]
[Normally 0 setting]
Selection of 28 pin output; BGPM [0], RDOF [1] [Normally 1 setting]
Adjustment of color saturation (main burst tracking in);
Min. value x 0[0], max. value x 2 [127], [1]/step
Output analog voltage value depends upon input burst signal level
[Normally 40h setting]
Main burst level tracking function control; ON [0], OFF [1] [0 setting at PIP]
When there is no main input burst signal at background display, set 1 to clear the
main burst tracking function.
Adjustment of burst gate pulse output phase for sub-screen;
[Normal setting value 1Dh]
For testing [Normally 0 setting]
For testing [Normally 0 setting]
Adjustment of color saturation; min.value [0], max.value [63], 1/step [Normally 3Fh
setting]
15h<5:0>, 16h<7:0> register default gate [Normally 1 setting]
For testing [0 setting]
8

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