ADV7127KRU140 Просмотр технического описания (PDF) - Analog Devices

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ADV7127KRU140

CMOS, 240 MHz 10-Bit High Speed Video DAC

Analog Devices 

ADV7127

Digital Signal Interconnect

The digital signal lines to the ADV7127 should be isolated as

much as possible from the analog outputs and other analog

circuitry. Digital signal lines should not overlay the analog

power plane.

Due to the high clock rates used, long clock lines to the ADV7127

should be avoided so as to minimize noise pickup.

Any active pull-up termination resistors for the digital inputs

should be connected to the regular PCB power plane (VCC), and

not the analog power plane.

Analog Signal Interconnect

The ADV7127 should be located as close as possible to the

output connectors thus minimizing noise pickup and reflections

due to impedance mismatch.

The video output signals should overlay the ground plane, and

not the analog power plane, thereby maximizing the high fre-

quency power supply rejection.

For optimum performance, the analog outputs should each

have a source termination resistance to ground of 75 Ω (doubly

terminated 75 Ω configuration). This termination resistance

should be as close as possible to the ADV7127 so as to mini-

mize reflections.

Additional information on PCB design is available in an applica-

tion note entitled “Design and Layout of a Video Graphics

System for Reduced EMI.” This application note is available

from Analog Devices, publication number E1309-15-10/89.

REV. 0

–15–

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