ADV7123JST240(RevB) Просмотр технического описания (PDF) - Analog Devices

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ADV7123JST240
(Rev.:RevB)

CMOS, 330 MHz Triple 10-Bit High Speed Video DAC

Analog Devices 

ADV7123

Any active pull-up termination resistors for the digital inputs

should be connected to the regular PCB power plane (VCC) and

not the analog power plane.

Analog Signal Interconnect

The ADV7123 should be located as close as possible to the

output connectors, thus minimizing noise pickup and reflections

due to impedance mismatch.

The video output signals should overlay the ground plane and

not the analog power plane, thereby maximizing the high fre-

quency power supply rejection.

For optimum performance, the analog outputs should each have

a source termination resistance to ground of 75 Ω (doubly

terminated 75 Ω configuration). This termination resistance

should be as close as possible to the ADV7123 to minimize

reflections.

Additional information on PCB design is available in an application

note entitled, Design and Layout of a Video Graphics System for

Reduced EMI. This application note is available from Analog

Devices, publication no. E1309–15–10/89.

0.1␮F

5V (VAA)

39-48

VIDEO

DATA

INPUTS

1-10

14-23

COMP

R9 –R0

VAA

VREF

POWER SUPPLY DECOUPLING (0.1␮F AND 0.01␮F

CAPACITOR FOR EACH VAA GROUP)

13, 29,

30

0.1␮F 0.01␮F

L1

VAA

(FERRITE BEAD)

ANALOG GROUND PLANE

0.1␮F

5V (VAA)

10␮F

RSET

G9–G0

IOR

B9–B0

IOG

RSET

530⍀

COAXIAL CABLE

75⍀

MONITOR

(CRT)

75⍀

75⍀

IOB

ADV7123

SYNC

IOR

BLANK

IOG

CLOCK

IOB

PSAVE

GND

25, 26

75⍀ 75⍀ 75⍀

75⍀

COMPLEMENTARY

OUTPUTS

BNC

CONNECTORS

VCC

33␮F

Figure 7. Typical Connection Diagram

–16–

REV. B

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