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ADSP-2186L1111

DSP Microcomputer

Analog Devices 

ADSP-2186L

This mode only has an effect when the MR0 register contains

0x8000; all other rounding operations work normally. This

mode allows more efficient implementation of bit-specified

algorithms that use biased rounding, for example the GSM

speech compression routines. Unbiased rounding is preferred

for most algorithms.

Note: BIASRND bit is Bit 12 of the SPORT0 Autobuffer

Control register.

INSTRUCTION SET DESCRIPTION

The ADSP-2186L assembly language instruction set has an

algebraic syntax that was designed for ease of coding and

readability. The assembly language, which takes full advantage

of the processor’s unique architecture, offers the following benefits:

• The algebraic syntax eliminates the need to remember cryptic

assembler mnemonics. For example, a typical arithmetic add

instruction, such as AR = AX0 + AY0, resembles a simple

equation.

• Every instruction assembles into a single, 24-bit word that

can execute in a single instruction cycle.

• The syntax is a superset ADSP-2100 Family assembly lan-

guage and is completely source and object code compatible

with other family members. Programs may need to be relo-

cated to utilize on-chip memory and conform to the ADSP-

2186L’s interrupt vector and reset vector map.

• Sixteen condition codes are available. For conditional jump,

call, return or arithmetic instructions, the condition can

be checked and the operation executed in the same instruc-

tion cycle.

• Multifunction instructions allow parallel execution of an

arithmetic instruction with up to two fetches or one write to

processor memory space during a single instruction cycle.

DESIGNING AN EZ-ICE-COMPATIBLE SYSTEM

The ADSP-2186L has on-chip emulation support and an

ICE-Port, a special set of pins that interface to the EZ-ICE. These

features allow in-circuit emulation without replacing the target

system processor by using only a 14-pin connection from the

target system to the EZ-ICE. Target systems must have a 14-pin

connector to accept the EZ-ICE’s in-circuit probe, a 14-pin plug.

Issuing the chip reset command during emulation causes the

DSP to perform a full chip reset, including a reset of its memory

mode. Therefore, it is vital that the mode pins are set correctly

PRIOR to issuing a chip reset command from the emulator user

interface.

If using a passive method of maintaining mode information (as

discussed in Setting Memory Modes), it does not matter that

the mode information is latched by an emulator reset. However,

if using the RESET pin as a method of setting the value of the

mode pins, the effects of an emulator reset must be taken into

consideration.

One method of ensuring that the values located on the mode

pins are the desired values is to construct a circuit like the one

shown in Figure 9. This circuit forces the value located on the

Mode A pin to logic low, regardless if it latched via the RESET

or ERESET pin.

ERESET

RESET

ADSP-2186L

1k⍀

MODE A/PF0

PROGRAMMABLE I/O

Figure 9. Boot Mode Circuit

See the ADSP-2100 Family EZ-Tools data sheet for complete

information on ICE products.

The ICE-Port interface consists of the following ADSP-2186L

pins:

EBR

EMS

ELIN

EBG

EINT

ELOUT

ERESET

ECLK

EE

These ADSP-2186L pins are usually connected only to the

EZ-ICE connector in the target system. These pins have no

function except during emulation, and do not require pull-up

or pull-down resistors. The traces for these signals between

the ADSP-2186L and the connector must be kept as short as

possible, no longer than three inches.

The following pins are also used by the EZ-ICE:

BR

BG

RESET GND

The EZ-ICE uses the EE (emulator enable) signal to take con-

trol of the ADSP-2186L in the target system. This causes the

processor to use its ERESET, EBR and EBG pins instead of

the RESET, BR and BG pins. The BG output is three-stated.

These signals do not need to be jumper-isolated in your system.

The EZ-ICE connects to your target system via a ribbon cable

and a 14-pin female plug. The female plug is plugged onto the

14-pin connector (a pin strip header) on the target board.

Target Board Connector for EZ-ICE Probe

The EZ-ICE connector (a standard pin strip header) is shown in

Figure 10. You must add this connector to your target board

design if you intend to use the EZ-ICE. Be sure to allow

enough room in your system to fit the EZ-ICE probe onto the

14-pin connector.

1

GND

3

EBG

5

EBR

7

KEY (NO PIN) ؋

9

ELOUT

11

EE

13

RESET

2

BG

4

BR

6

EINT

8

ELIN

10

ECLK

12

EMS

14

ERESET

TOP VIEW

Figure 10. Target Board Connector for EZ-ICE

–12–

REV. B

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