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MSM82C51A

UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER TRANSMITTER

Oki Electric Industry 

¡ Semiconductor

MSM82C51A-2RS/GS/JS

Serial Interface Part

Parameter

Main Clock Period

Clock Low Tme

Clock High Time

Clock Rise/Fall Time

TXD Delay from Falling Edge of TXC

1 ¥ Baud

Transmitter Clock Frequency 16 ¥ Baud

64 ¥ Baud

Transmitter Clock Low Time

1 ¥ Baud

16 ¥, 64 ¥ Baud

Transmitter Clock High Time

1 ¥ Baud

16 ¥, 64 ¥ Baud

1 ¥ Baud

Receiver Clock Frequency

16 ¥ Baud

64 ¥ Baud

Receiver Clock Low Time

1 ¥ Baud

16 ¥, 64 ¥ Baud

Receiver Clock High Time

1 ¥ Baud

16 ¥, 64 ¥ Baud

Time from the Center of Last Bit to the Rise of

TXRDY

Time from the Leading Edge of WR to the Fall

of TXRDY

Symbol

tCY

tf

tf

tr, tf

tDTX

fTX

fTX

fTX

tTPW

tTPW

tTPD

tTPD

fRX

fRX

fRX

tRPW

tRPW

tRPD

tRPD

tTXRDY

tTXRDY CLEAR

(VCC = 4.5 to 5.5 V, Ta = –40 to 85°C)

Min. Max. Unit Remarks

160

—

ns

Note 3

50

—

ns

—

70

tCY –50

ns

—

—

20

ns

—

—

1

mS

—

DC

64

kHz

DC

615

kHz

Note 3

DC

615

kHz

13

—

tCY

—

2

—

tCY

—

15

—

tCY

—

3

—

tCY

—

DC

64

kHz

DC

615

kHz

Note 3

DC

615

kHz

13

—

tCY

—

2

—

tCY

—

15

—

tCY

—

3

—

tCY

—

—

8

tCY

—

—

400

ns

—

Time From the Center of Last Bit to the Rise of RXRDY tRXRDY

—

26

tCY

—

Time from the Leading Edge of RD to the Fall

of RXRDY

tRXRDY CLEAR

—

400

ns

—

Internal SYNDET Delay Time from Rising Edge of RXC

tIS

—

26

tCY

—

SYNDET Setup Time for RXC

tES

18

—

tCY

—

TXE Delay Time from the Center of Last Bit

tTXEMPTY

20

—

tCY

—

MODEM Control Signal Delay Time from Rising Edge

of WR

tWC

8

—

tCY

—

MODEM Control Signal Setup Time for Falling Edge

of RD

tCR

20

—

tCY

—

RXD Setup Time for Rising Edge of RXC (1X Baud)

tRXDS

11

—

tCY

—

RXD Hold Time for Falling Edge of RXC (1X Baud)

tRXDH

17

—

tCY

—

Notes:

1. AC characteristics are measured at 150 pF capacity load as an output load based on 0.8 V at

low level and 2.2 V at high level for output and 1.5 V for input.

2. Addresses are CS and C/D.

3. fTX or fRX £ 1/(30 Tcy) 1¥ Baud

fTX or fRX £ 1/(5 Tcy) 16¥, 64¥ Baud

4. This recovery time is mode Initialization only. Recovery time between command writes for

Asynchronous Mode is 8 tCY and for Synchronous Mode is 18 tCY.

Write Data is allowed only when TXRDY = 1.

5. This recovery time is Status read only.

Read Data is allowed only when RXRDY = 1.

6. Status update can have a maximum delay of 28 clock periods from event affecting the status.

14/26

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