AT91SAM9CN11-CFU Просмотр технического описания (PDF) - Atmel Corporation

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производитель

AT91SAM9CN11-CFU

ARM-based Embedded MPU

Atmel Corporation 

Doc. Rev Comments

11063J

PIO:

Section 23.2 ”Embedded Characteristics”, removed a bullet on configuration lock.

Section 23.4.4 ”Interrupt Generation”, revised content in the 1st paragraph.

Section 23.5 ”Functional Description”:

- added pull-down resistor and the corresponding registers in Figure 23-3, "I/O Line Control Logic"

- Section 23.5.14 ”Register Write Protection”:

- changed the section title and revised the content

Section 23.7 ”Parallel Input/Output Controller (PIO) User Interface”:

- Table 23-2 ”Register Mapping”:

- removed references to PIO Lock Status Register (PIO_LOCKSR) and assigned the corresponding

offset 0x00E0 to reserved registers

- Section 23.7.29 ”PIO Slow Clock Divider Debouncing Register”:

- DIV: updated the field name from DIVx to DIV

- removed the “PIO Lock Status Register” section

- Section 23.7.45 ”PIO Write Protection Mode Register”:

- modified the register name

- WPEN: replaced the list of protectable registers with a cross-reference to Section 23.5.14 ”Register

Write Protection”

- WPKEY: replaced the bitfield description with a table

- Section 23.7.46 ”PIO Write Protection Status Register”:

- modified the register name

- WPVSRC: updated the bitfield description and removed a note

- Section 23.7.47 ”PIO Schmitt Trigger Register”

- SCHMITTx [x=0..31]: added description of the bit name

- Section 23.7.48 ”PIO I/O Delay Register”

- Delayx [x=0..7]: updated the bit name from ‘Delay x’ to ‘Delayx [x=0..7]’ and added name description

DBGU:

Section 24.6.10 ”Debug Unit Chip ID Register”:

- EPROC bitfield description table: removed the last row (value 6)

FUSE:

Section 25.5 ”Fuse Controller (FUSE) User Interface”:

- Table 25-1 ”Register Mapping”, updated FUSE_CR access from ‘Read-write’ to ‘Write-only’

- Section 25.5.1 ”Fuse Control Register”, replaced KEY field description with a table

MATRIX

Section 26.10.6 ”Write Protect Mode Register”:

- WPKEY: replaced the bitfield description with a table

EBI:

Added titles to figures in Section 27.7.4 “Power Supplies” and Section 27.8 “Implementation Examples”.

Added Figure 27-13, "16-bit NAND Flash with NFD0_ON_D16 = 1".

Change

Request

Ref.

8909

8324

8522

rfo

8909

rfo

8909

rfo

rfo

8522

rfo

rfo

rfo

rfo

8686

8065/rfo

rfo

rfo

SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET] 1081

11063K–ATARM–05-Nov-13

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