TABLE 1-3: DIGITAL ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = 1.8V to 5.5V, VSS = GND, VCM = VDD/2, VDM = 0V, VREF = VDD/2, VL = VDD/2,
RL = 10 kΩ to VL, CL = 60 pF, GDM = GMIN and EN = VDD; see Figures 1-7 and 1-8.
Parameters
Sym. Min.
Typ.
Max. Units GMIN
Conditions
EN Low Specifications
EN Logic Threshold, Low
EN Input Current, Low
GND Current
Amplifier Output Leakage
EN High Specifications
VIL
—
IENL
—
ISS
-8
IO(LEAK)
—
—
0.2VDD V
all
-10
—
pA
EN = 0V
-2
—
µA
-1
—
nA
EN = 0V, VDD = 5.5V
EN = 0V
EN Logic Threshold, High
VIH 0.8VDD
—
—
EN Input Current, High
IENH
—
10
—
EN Dynamic Specifications
EN Input Hysteresis
EN Input Resistance
VHYST
RPD
— 0.16VDD —
—
1013
—
EN Low to Amplifier Output High Z Turn-Off Time tOFF
—
0.1
2
EN High to Amplifier Output On Time
tON
—
12
100
—
30
100
EN Low to EN High hold time
tENLH
50
—
—
EN High to EN Low setup time
tENHL
50
—
—
POR Dynamic Specifications
VDD ↓ to Output Off
VDD ↑ to Output On
tPHL
—
10
—
tPLH
—
100
—
Note 1: For design guidance only; not tested.
V all
pA
EN = VDD
V all
Ω
µs
EN = 0.2VDD to VOUT = 0.1(VDD/2), VL = 0V
VDD = 1.8V, EN = 0.8VDD to VOUT = 0.9(VDD/2), VL = 0V
VDD = 5.5V, EN = 0.8VDD to VOUT = 0.9(VDD/2), VL = 0V
Minimum time before releasing EN (Note 1)
Minimum time before exerting EN (Note 1)
µs all VL = 0V, VDD = 1.8V to VPRL – 0.1V step, 90% of VOUT change
VL = 0V, VDD = 0V to VPRH + 0.1V step, 90% of VOUT change