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6.4 The Input Data Format
6.4.1 SEL68
SEL68 =“Low” or “NC” for 6 bits LVDS Input
SEL68 = “High” for 8 bits LVDS Input
NS-like format
G121SN01 V4
Note1: Please follow PSWG.
Note2: R/G/B data 7:MSB, R/G/B data 0:LSB
Signal Name
+RED5(R5)
+RED4(R4)
+RED3(R3)
+RED2(R2)
+RED1(R1)
+RED0(R0)
+GREEN5(G5)
+GREEN4(G4)
+GREEN3(G3)
+GREEN2(G2)
+GREEN1(G1)
+GREEN0(G0)
+BLUE5(B5)
+BLUE4(B4)
+BLUE3(B3)
+BLUE2(B2)
+BLUE1(B1)
+BLUE0(B0)
CLK
Description
Red Data 5 (MSB)
Red Data 4
Red Data 3
Red Data 2
Red Data 1
Red Data 0 (LSB)
Red-pixel Data
Green Data 5 (MSB)
Green Data 4
Green Data 3
Green Data 2
Green Data 1
Green Data 0 (LSB)
Green-pixel Data
Blue Data 5 (MSB)
Blue Data 4
Blue Data 3
Blue Data 2
Blue Data 1
Blue Data 0 (LSB)
Blue-pixel Data
Data Clock
DE
Display Timing
Red-pixel Data
Each red pixel’s brightness data consists of these
6 bits pixel data.
Green-pixel Data
Each green pixel’s brightness data consists of these
6 bits pixel data.
Blue-pixel Data
Each blue pixel’s brightness data consists of these
6 bits pixel data.
The typical frequency is 40MHz. The signal is
used to strobe the pixel data and DE signals.
All pixel data shall be valid at the falling edge when
the DE signal is high.
This signal is strobed at the falling edge of CLK.
When the signal is high, the pixel data shall be valid
to be displayed.
provided by
www.display-solution.com
G121SN01 V4 rev. 0.0
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