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X3102 Просмотр технического описания (PDF) - Intersil

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X3102 Datasheet PDF : 32 Pages
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X3102
TPUR
VCC
VSLR
0V
VRGO
0V
Voltage Regulator Output Status
(Internal Signal)
VRGS
Overcurrent Detection Status
(Internal Signal) OCDS
Status Register Bit 0
VRGS+OCDS
Status Register Bit 2
(SWCEN = 0) CCES+OVDS
Status Register Bit 2
(SWCEN = 1)
OVDS
5V±10% (Stable and Repeatable)
VRGO Tuned to 5V±0.5%
5V
2ms (Typ.)
1
0
TOC
1
1 = X3102 in overcurrent Protection Mode
0 = X3102 NOT in overcurrent Protection Mode
0
1 1 = X3102 in overcurrent Protection Mode OR VRGO Not Yet Tuned
0 = X3102 NOT in overcurrent Protection Mode AND VRGO Tuned
TOV+200ms
0
1
0
1 = VCELL < VCE OR X3102 in Over-charge Protection Mode
0 = VCELL > VCE OR X3102 NOT in Over-charge Protection Mode
1
0
1 = X3102 in Over-charge Protection Mode
0 = X3102 NOT in Over-charge Protection Mode
AS2_AS0
SPI PORT
TOV+200ms OR TUV+200ms (whichever is longer)
Any Read or Write Operation, except turn-
on of FETs can start here.
Charge, Discharge FETs can be
turned on here.
FIGURE 8. POWER UP TIMING (INITIAL POWER UP OR AFTER SLEEP MODE)
14
FN8246.0
December 22, 2004

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