X24165 Просмотр технического описания (PDF) - IC MICROSYSTEMS

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X24165

Advanced 2-Wire Serial E2PROM with Block Lock™ Protection

IC MICROSYSTEMS 

X24165

Sequential Read

Sequential reads can be initiated as either a current

address read or random access read. The first word is

transmitted as with the other modes, however, the

master now responds with an acknowledge, indicating

it requires additional data. The X24165 continues to

output data for each acknowledge received. The read

operation is terminated by the master; by not responding

with an acknowledge and then issuing a

stop condition.

The data output is sequential, with the data from

address n followed by the data from n + 1. The address

counter for read operations increments all address bits,

allowing the entire memory contents to be serially read

during one operation. At the end of the address space

(address 2047), the counter “rolls over” to 0 and the

X24165 continues to output data for each acknowledge

received. Refer to Figure 9 for the address,

acknowledge and data transfer sequence.

Figure 9. Sequential Read

BUS ACTIVITY:

MASTER

SDA LINE

BUS ACTIVITY:

X24165

SLAVE

ADDRESS

A

A

A

C

C

C

K

K

K

A

C

K

DATA n

DATA n+1

DATA n+2

S

T

O

P

P

DATA n+x

6551 ILL F13

Figure 10. Typical System Configuration

SDA

SCL

MASTER

TRANSMITTER/

RECEIVER

SLAVE

RECEIVER

SLAVE

TRANSMITTER/

RECEIVER

MASTER

TRANSMITTER

MASTER

TRANSMITTER/

RECEIVER

V

CC

PULL-UP

RESISTORS

6551 ILL F14

8

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