VT83201D Просмотр технического описания (PDF) - Vaishali Semiconductor
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VT83201D
Vaishali Semiconductor
VT83201D Datasheet PDF : 4 Pages
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VT83201
Figure 2. Pin Configuration
VT83201
16 pin SOIC
X1
1
VDD1
2
VDD1
3
VIN 4
GND 5
GND 6
GND 7
OE 8
16 X2
15
NC
14 S1
13 GND
12 CLK2
11
VDD2
10 S0
9 CLK1
Table 1. Pin Description
Name
X1
VDD1
VIN
GND
OE
CLK1
S0
VDD2
CLK2
S1
NC
X2
Pin #
1
2,3
4
5,6, 7,13
8
9
10
11
12
14
15
16
Type
Description
XI
Crystal connection. Connect to a pullable crystal of 10–20 MHz
P
Core VDD. Connect to 3.3V
I
Voltage input to VCXO. Zero to 3V signal controls the frequency of the VCXO.
P
Connect to ground.
I
Active HIGH Output enable . Outputs in Hi-Z state when LOW
O
Clock output #1 per Table 2.
I
Select input #0. Selects output per Table 2
P
Output VDD. Connect to 3.3V
O
Clock output #2 per Table 2
I
Select input #1. Selects outputs per Table 2
-
There is no internal connection to this pin.
XO Crystal connection. Connect to a pullable crystal of 10 MHz – 20 MHz.
Legend: I = Input
O = Output
P = Power supply connection
XI, XO = Crystal connections.
2001-04-12
Page 2
MDST-0011-01
www.Vaishali.com
Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063
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