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VSC8201

SimpliPHY® VSC8201 PCB Design and Layout Guide Single Port 10/100/1000BASE-Tand 1000BASE-X PHY

Vitesse Semiconductor 

VSC8201DL

Serial Management Interface

The VSC8201 contains a standard Serial Management Interface (SMI) as defined by IEEE standards. This interface consists of the fol-

lowing signals:

Table 6: Serial Management Interface Pins

Signal Name

Type

Description

MDC

MDIO

MDINT#

Input

Open Drain

Open Drain

Management Data Clock. A 0 to 25MHz reference input used to clock serial MDIO data into

and out of the VSC8201. The expected nominal frequency is 2.5MHz, as specified by the IEEE

standard. This clock is typically asynchronous with respect to the PHY’s transmit or receive

clock.

Management Data I/O. MDIO configuration and status data is exchanged on this pin bidirec-

tionally between the PHY and the Station Manager, synchronously to the rising edge of MDC.

This pin normally requires a 1.5kΩ to 2kΩ external pull-up resistor at the Station Manager. The

value of the pull-up resistor depends on the MDC clock frequency and the maximum capacitive

load on the MDIO pin.

Management Data Interrupt Output. This open drain, active low output signal indicates a

change in the PHY’s link operating conditions for which a station manager must interrogate to

determine further information. This pin should be pulled up to VDDIO at the Station Manager or

controller through an external 10kΩ pull-up resistor.

It is important to note that both MDIO and MDINT# signals are configured as open drain, and thus require an external pullup resistor.

Only a single pullup resistor on each signal is needed for the system, regardless of the number of devices. For MDINT# a single 10kohm

system pullup resistor is sufficient.

Unlike MDINT#, the value of the pullup needed for MDIO must be chosen to match the characteristics of the system. Of critical impor-

tance is the rise time needed to charge the total capacitive load on the MDIO up to logic ‘1’ through the pullup resistor. This constant is

defined simply as:

τ = RpuCtotal

In most cases the number of devices on the bus will be 1. But in the case where more devices are added to the bus, the rise time

increases due to the increased bus capacitance. In order to lower the rise time, a smaller resistor value must be used. However, if too

small of a value is used, devices will be unable to transition the bus to a logic ‘0’. This occurs when the current sinking capability of the

pins in a logic ‘0’ state is exceeded. For the VSC8201, the MDIO input capacitance is 5pF, and the maximum current sinking capacity is

10mA.

Typical values are given below:

• For MDC frequencies of 2.5MHz and below, a 2k pullup resistor should suffice for most applications.This assumes the input capaci-

tance of each device is between 5-10pF and that each device can sink 1.65mA of current in the MDIO pin.

• For faster MDC frequencies (>2.5MHz), a smaller pullup is necessary. The smallest recommended pullup resistor for use with the

VSC8201 is 470 Ω .

Rev. 1.6.3 - 9/29/04

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