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USB1T1104

Universal Serial Bus Peripheral Transceiver with Voltage Regulator

Fairchild Semiconductor 

Connection Diagram

Terminal Descriptions

(Bottom View)

Terminal

Number

1

Terminal

Name

OE

2

RCV

3

Vp

4

Vm

5

SUSPND

6

MODE

7

8

10, 9

11

12

13

14

15

VCCIO

Vbusmon

D, D

Vpo / Vo

Vmo / FSEO

VREG (3.3V)

VCC (5.0V)

VPU (3.3V)

16

Config

I/O

Terminal Description

I

O

O

O

I

I

O

AI/O

I

I

I

Output Enable: Active LOW enables the transceiver to transmit data on the bus. When not

active the transceiver is in the receive mode (CMOS level is relative to VCCIO)

Receive Data Output: Non-inverted CMOS level output for USB differential Input (CMOS

output level is relative to VCCIO). Driven LOW when SUSPN is HIGH; RCV output is stable

and preserved during SE0 condition.

Single-ended D receiver output VP (CMOS level relative to VCCIO): Used for external

detection of SEO, error conditions, speed of connected device; Driven HIGH when no

supply connected to VCC and VREG.

Single-ended D receiver output Vm (CMOS level relative to VCCIO): Used for external

detection of SEO, error conditions, speed of connected device; Driven HIGH when no

supply connected to VCC and VREG.

Suspend: Enables a low power state (CMOS level is relative to VCCIO).

While the SUSPND pin is active (HIGH) it will drive the RCV pin to logic “0” state.

MODE input (CMOS level is relative to VCCIO). A HIGH selects the differential input MODE

(Vpo, Vmo) whereas a LOW enables the single-ended MODE (Vo, VFSEO) see Table 2 and

Table 4

Supply Voltage for digital I/O pins (1.65V to 3.6V): When not connected the D and D

pins are in 3-STATE. This supply bus is totally independent of VCC (5V) and VREG (3.3V).

Vbus monitor output (CMOS level relative to VCCIO): When Vbus ! 4.1V then

Vbusmon = HIGH and when Vbus  3.6V then Vbusmon = LOW.

Data , Data : Differential data bus conforming to the USB standard.

Driver Data Input (CMOS level is relative to VCCIO); Schmitt trigger input; see Table 2 and

Table 3

Driver Data Input (CMOS level is relative to VCCIO); Schmitt trigger input; see Table 2 and

Table 3

Internal Regulator Option: Regulated supply output voltage (3.0V to 3.6V) during 5V oper-

ation; decoupling capacitor of at least 0.1 PF is required.

Internal Regulator Option: Used as supply voltage input (4.0V to 5.5V); can be connected

directly to USB line Vbus.

Pull-up Supply Voltage (3.3V r 10%): Connect an external 1.5k: resistor on D (FS data

rate); Pin function is controlled by Config input pin:

Config = LOW  VPU (3.3V) is floating (High Impedance) for zero pull-up current.

Config = HIGH  VPU (3.3V) = 3.3V; internally connected to VREG (3.3V).

USB connect or disconnect software control input. Configures 3.3V to external 1.5k:

resistor on D when HIGH.

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