UPD77115 Просмотр технического описания (PDF) - NEC => Renesas Technology
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UPD77115 Datasheet PDF : 56 Pages
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µPD77115, 77115A
Instruction Set
Instruc-
tion
Instruction
Name
Mnemonic
Operation
Instructions Simultaneously Written
Flag
Imme-
Trino- Bino- Unino- Load/ Trans-
Bran-
Cont-
diate
Loop
OV
mial mial minal store fer
ch
rol
value
Trinomial Multiply add
ro = ro + rh * rh’
ro ← ro + rh * rh’
√
operation Multiply sub
ro = ro − rh * rh’
ro ← ro − rh * rh’
√
Sign unsign
ro = ro + rh * rl
ro ← ro + rh * rl
√
multiply add
(rl is in positive integer
format.)
Unsign unsign
ro = ro + rl * rl’
ro ← ro + rl * rl’
√
multiply add
(rl and rl’ are in
positive integer
format.)
1-bit shift multiply ro = (ro>>1) + rh * rh’
ro
←
ro
2
+
rh
*
rh’
√
add
16-bit shift multiply ro = (ro>>16) + rh * rh’
ro
←
ro
216
+
rh
*
rh’
√
•
add
Binomial Multiply
ro = rh * rh’
ro ← rh * rh’
√
•
operation Add
ro” = ro + ro’
ro” ← ro + ro’
√
Immediate add
ro’ = ro + imm
ro’ ← ro + imm
(where imm ≠ 1)
Sub
ro” = ro − ro’
ro” ← ro − ro’
√
Immediate sub
ro’ = ro − imm
ro’ ← ro − imm
(where imm ≠ 1)
Arithmetic right ro’ = ro SRA rl
ro’ ← ro >> rl
√
•
shift
Immediate
ro’ = ro SRA imm
ro’ ← ro >> imm
•
arithmetic right
shift
Logical right shift ro’ = ro SRL rl
ro’ ← ro >> rl
√
•
Immediate logical ro’ = ro SRL imm
ro’ ← ro >> imm
•
right shift
Logical left shift ro’ = ro SLL rl
ro’ ← ro << rl
√
•
Immediate logical ro’ = ro SLL imm
ro’ ← ro << imm
•
left shift
AND
ro” = ro & ro’
ro” ← ro & ro’
√
•
Immediate AND ro’ = ro & imm
ro’ ← ro & imm
•
OR
ro” = ro ro’
ro” ← ro ro’
√
•
Immediate OR
ro’ = ro imm
ro’ ← ro imm
•
Exclusive OR
ro” = ro ∧ ro’
ro” ← ro ∧ ro’
√
•
Immediate
ro’ = ro ∧ imm
ro’ ← ro ∧ imm
•
exclusive OR
28
Data Sheet U14867EJ5V0DS
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