µPD6461, 6462
3.8 OUTPUT PIN CONTROL COMMAND
This command distributes character signals to the VC1 and VC2 channels (this command is a 2-byte command, requiring
16 bits for each command, even when continuously input). The µPD6461, 6462 support a mask option for selecting one
of three formats for the output distribution format for the VC1 and VC2 channels.
(1) For MSB-first transfer (Command bits are input starting from the MSB (D15).)
(MSB)
(LSB)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
1
0
0
1
1
1
0
0
VC2
VC1
0
0 AR3 AR2 AR1 AR0
AR3 AR2
0
0
0
0
Row specification bits
AR1 AR0
Function
0
0
Specifies row 0.
0
1
Specifies row 1.
1
0
1
1
Specifies row 11.
Other values are invalid.
Option A
VC2
0
0
Output pin control bits
VC1
Output from each pin
0 VC1: Outputs a specified row. VC2: Fixed to low level.
1 VC1: Fixed to low level. VC2: Outputs a specified row.
Option B
VC2
0
0
Output pin control bits
VC1
Output from each pin
0 VC1: Outputs all rows. VC2: Fixed to low level.
1 VC1: Outputs all rows. VC2: Outputs a specified row.
Option C
VC2
0
0
1
1
Output pin control bits
VC1
Output from each pin
0 VC1: Outputs columns 0 to 23. VC2: Fixed to low level.
1 VC1: Outputs columns 0 to 11. VC2: Outputs columns 12 to 23.
0 VC1: Outputs columns 12 to 23. VC2: Outputs columns 0 to 11.
1 VC1: Fixed to low level. VC2: Outputs columns 0 to 23.
(2) For LSB-first transfer (Command bits are input starting from the LSB (D0). The function of each bit is the same as
that for MSB-first transfer.)
(LSB)
(MSB)
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
0
0
1
1
1
0
0
1 AR0 AR1 AR2 AR3 0
0
VC1
VC2
• Row specification bits
Output distribution to the VC1 and VC2 pins is specified for each row (or for 12 columns). These bits are used to
specify the row.
• Output pin control bits
These bits are used to distribute character output signals to the VC1 and VC2 pins depending on whether option
A, B, or C has been selected by specifying a mask option (the corresponding blanking signals are output likewise).
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