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UPD6125A Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD6125A Datasheet PDF : 40 Pages
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µPD6125A, 6126A
11. PIN FUNCTIONS
11.1 KI/O Pin (P0)
This is the 8-bit I/O pin for key-scan output. When the control register (P1) is set for the input port, the port can
be used as an 8-bit input pin. When the port is set for the input mode, all of these pins are pulled down to the VSS
level inside the LSI.
When “all clear” is input or on reset, input/output mode goes into effect, and the value of output latch becomes
undefined.
Figure 11-1. KI/O Pin Organization
(P1 )
Countrol
P10
P00
register
P0
KI/O7
KI/O6
KI/O5
KI/O4
KI/O3
KI/O2
KI/O1
KI/O0
11.2 KI/O Pull-Down Resistor Organization
Input/output selection
Output signal
Input signal
CMOS
V DD
P-ch
Pin
N-ch
V SS
R Pull-down resistor
N-ch
When KI/O is set to the input mode, pull-down resistor R is turned on.
9

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