UPD4722GS Просмотр технического описания (PDF) - NEC => Renesas Technology

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производитель

UPD4722GS

RS-232 LINE DRIVER/RECEIVER AT 3.3 V/5 V

NEC => Renesas Technology 

µPD4722

BLOCK DIAGRAM/PIN CONFIGURATION (TOP VIEW)

+3.3 V

or

+5 V

C1 +

+10 V

C3 +

1 VDD

2 C1+

3 VCC

4 C1–

C5 +

5 C5+

6 GND

7 C5–

DIN1 8

Note 4

DIN2 9

DIN3 10

DIN4 11

C4+ 30

GND 29

C4– 28

+

C4

+

C2

VSS 27

26 STBY

–10 V

25 VCHA

300 Ω

300 Ω

300 Ω

300 Ω

24 EN

23 DOUT1

22 DOUT2

21 DOUT3

20 DOUT4

ROUT1 12

ROUT2 13

ROUT3 14

ROUT4 15

5.5 kΩ

5.5 kΩ

5.5 kΩ

5.5 kΩ

19 RIN1

18 RIN2

17 RIN3

16 RIN4

Note

1. VDD and VSS are output pins stepped up internally. These pins should not be loaded directly.

2. Capacitors C1 to C5 with a breakdown voltage of 20 V or higher are recommended. And it is

recommended to insert the capacitor that is 0.1 µF to 1 µF between VCC and GND.

3. If VCHA is kept low level (in 5 V mode), capacitor C5 is not necessary.

4. The pull-up resistors at driver input are active resistors.

2

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