UPD161831 Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD161831

240/244-OUTPUT TFT-LCD SOURCE DRIVER WITH TIMING GENERATOR (COMPATIBLE WITH 64-GRAY SCALES)

NEC => Renesas Technology 

µPD161831

4.2.9 Amplifier drive period setting register

In the µPD161831, the amplifier drive period is set with the horizontal period address count (HCNT) as the driver

output. The amplifier drive period set with this register is the drive period of R, G, and B, respectively, when division

by 3 is performed. The amplifier drive start timing is the RGW_O, GSW_O, and BSW_O signal start timing. For

detail, refer to figures 4−2 through 4−6.

Note that the setting of this register is reflected to the operation immediately after the register is set. The effective

bits of this register are bit 0 to bit 4.

Figure 4−7 indicates how the amplifier of the µPD161831 is driven.

Table 4−11. Amplifier Drive Period Setting Register (R8)

Register Set Value

00H

01H

02H

03H

04H

:

1DH

1EH

1FH

Horizontal Period Address Count

0

1

2

3

4

:

29

30

31

Preliminary Product Information S16269EJ2V0PM

21

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