UPD16635 Просмотр технического описания (PDF) - NEC => Renesas Technology
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UPD16635 Datasheet PDF : 19 Pages
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µPD16635
Conditions Required for Timing
(TA = –10 to +75 °C, VDD1 = 3.3 V ±0.3 V, VSS1 = VSS2 = 0 V, tr = tf = 8.0 ns)
Parameter
Clock Pulse Width
Clock Pulse Low Period
Clock Pulse High Period
Data Setup Time
Data Hold Time
Start Pulse Setup Time
Start Pulse Hold Time
Start Pulse Low Period
STB Pulse Width
Data Invalid Period
Final Data Timing
CLK-STB Time
STB-CLK Time
Time Between STB and
Start Pulse
POL-STB Time
STB-POL Time
Symbol
PWCLK
PWCLK(L)
PWCLK(H)
tSETUP1
tHOLD1
tSETUP2
tHOLD2
tSPL
PWSTB
tINV
tLDT
tCLK-STB
tSTB-CLK
tSTB-STH
Condition
CLK ↑ → STB ↓
STB ↓ → CLK ↑
STB ↓ → STHR ↑
tPOL-STB
tSTB-POL
POL ↑ or ↓ → STB ↑
STB ↓ → POL ↑ or ↓
MIN.
30
6
6
6
6
6
6
6
1
1
2
6
6
60
TYP.
MAX.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
µs
CLK
CLK
ns
ns
ns
–5
ns
6
ns
13
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