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UPD16449 Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD16449 Datasheet PDF : 28 Pages
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µPD16449
5. FUNCTIONAL DISCRIPTION
5.1 Multiplexer Circuit
This circuit selects RGB video signals input to the C1 to C3 pins according to the pixel array of the liquid crystal
panel, and outputs the signals to the H1 through H240 pins.
Vertical stripe array, single-/double-side delta array, or mosaic array can be selected by using the MP/TH and
MP/1.5 pins.
5.1.1 Vertical stripe array mode (MP/TH = L, MP/1.5 = L)
In this mode, the relation between video signals C1 to C3, and output pins is as shown below. This mode is used to
drive a panel of vertical stripe array. In this mode, the multiplexer circuit is in the through status.
Table 51. Relation between Video Signals C1 to C3, and Output Pins (during right shift)
Line No.
RESET
INH
H1 (H240)
(number of INHn)
Sampling
0
H
L
C1 (C3)
Output
1
L
C1 (C3)
Output
2
L
C1 (C3)
Output
3
L
C1 (C3)
:
:
:
:
Remark ( ) indicates the case of left shift.
H2 (H239)
Sampling
C2 (C2)
Output
C2 (C2)
Output
C2 (C2)
Output
C2 (C2)
:
H3 (H238)
Sampling
C3 (C1)
Output
C3 (C1)
Output
C3 (C1)
Output
C3 (C1)
:
H4 (H237) ... H239 (H2) H240 (H1)
Sampling
C1 (C3)
Output
C1 (C3)
Output
C1 (C3)
Output
C1 (C3)
:
... Sampling
C2 (C2)
... Output
C2 (C2)
... Output
C2 (C2)
... Output
C2 (C2)
...
:
Sampling
C3 (C1)
Output
C3 (C1)
Output
C3 (C1)
Output
C3 (C1)
:
Figure 51. Pixel Arrangement of Vertical Stripe Array and Multiplexer Operation
R C1
B C2 µPD16449
G C3
H1
H2
Right shift (R,/L = "H"), MP/TH = "L", MP/1.5 = "L"
H3
H4
H5
H6
H7
R
B
G
R
B
G
R
R
B
G
R
B
G
R
R
B
G
R
B
G
R
R
B
G
R
B
G
R
R
B
G
R
B
G
R
8
Data Sheet S15677EJ1V0DS

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