TZA3044(1998) Просмотр технического описания (PDF) - Philips Electronics

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Компоненты Описание

производитель

TZA3044
(Rev.:1998)

1.25 Gbits/s Gigabit Ethernet postamplifiers

Philips Electronics 

Philips Semiconductors

1.25 Gbits/s Gigabit Ethernet postamplifiers

Objective specification

TZA3044T; TZA3044U

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX. UNIT

PECL outputs: ST and STQ

VOL

LOW-level output voltage

RL = 50 Ω to VCC − 2 V VCC − 1840 −

VOH

HIGH-level output voltage

RL = 50 Ω to VCC − 2 V VCC − 1100 −

tr

rise time

20% to 80%

−

−

tf

fall time

80% to 20%

−

−

VCC − 1620 mV

VCC − 900 mV

600

ns

200

ns

PECL input: JAM

VIL

VIH

II(JAM)

LOW-level input voltage

HIGH-level input voltage

JAM input current

note 5

−

−

VCC − 1165 −

−10

−

VCC − 1490 mV

−

mV

+10

µA

Reference voltage output: Vref

Vref

reference voltage

note 6

1.165

1.20

1.235

V

Notes

1. DOUT, DOUTQ, ST and STQ outputs are left unconnected.

2. If the input is DC coupled, the preceding amplifier’s output offset voltage should not exceed these limits, in order to

avoid malfunctioning of the DC offset compensation circuit.

3. Input RMS noise = t--o----tl-oa----wl---o---fu-r--et--p--q-u--u--t-e--R--n--M-c---y-S----g--n-a--o-i--n-i-s---e--

4. The reference currents can be set by a resistor between VCCA and pin RSET. The corresponding input signal

level-detect range is from 2 to 12 mV (p-p) single-ended. See section “Input signal level-detection” for detailed

information.

5. Internal pull-down resistor of 500 kΩ to DGND.

6. Internal series resistor of 1 kΩ.

1998 Jul 07

12

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