AD7710 Просмотр технического описания (PDF) - Analog Devices
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AD7710 Datasheet PDF : 32 Pages
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AD7710–SPECIFICATIONS (AVDD = +5 V ؎ 5%; DVDD = +5 V ؎ 5%; VSS = 0 V or –5 V ؎ 5%; REF IN(+) = +2.5 V;
REF IN(–) = AGND; MCLK IN = 10 MHz unless otherwise noted. All specifications TMIN to TMAX, unless otherwise noted.)
Parameter
A, S Versions1 Unit
Conditions/Comments
STATIC PERFORMANCE
No Missing Codes
Output Noise
Integral Nonlinearity @ +25°C
TMIN to TMAX
Positive Full-Scale Error2, 3
Full-Scale Drift5
Unipolar Offset Error2
Unipolar Offset Drift5
Bipolar Zero Error2
Bipolar Zero Drift5
Gain Drift
Bipolar Negative Full-Scale Error2 @ 25°C
TMIN to TMAX
Bipolar Negative Full-Scale Drift5
24
22
18
15
12
Tables I and II
± 0.0015
± 0.003
See Note 4
1
0.3
See Note 4
0.5
0.25
See Note 4
0.5
0.25
2
± 0.003
± 0.006
1
0.3
Bits min
Bits min
Bits min
Bits min
Bits min
% of FSR max
% of FSR max
µV/°C typ
µV/°C typ
µV/°C typ
µV/°C typ
µV/°C typ
µV/°C typ
ppm/°C typ
% of FSR max
% of FSR max
µV/°C typ
µV/°C typ
Guaranteed by Design. For Filter Notches ≤ 60 Hz
For Filter Notch = 100 Hz
For Filter Notch = 250 Hz
For Filter Notch = 500 Hz
For Filter Notch = 1 kHz
Depends on Filter Cutoffs and Selected Gain
Filter Notches ≤ 60 Hz
Typically ± 0.0003%
Excluding Reference
Excluding Reference. For Gains of 1, 2
Excluding Reference. For Gains of 4, 8, 16, 32, 64, 128
For Gains of 1, 2
For Gains of 4, 8, 16, 32, 64, 128
For Gains of 1, 2
For Gains of 4, 8, 16, 32, 64, 128
Excluding Reference
Typically ± 0.0006%
Excluding Reference. For Gains of 1, 2
Excluding Reference. For Gains of 4, 8, 16, 32, 64, 128
ANALOG INPUTS/REFERENCE INPUTS
Input Common-Mode Rejection (CMR)
Common-Mode Voltage Range6
Normal-Mode 50 Hz Rejection7
Normal-Mode 60 Hz Rejection7
Common-Mode 50 Hz Rejection7
Common-Mode 60 Hz Rejection7
DC Input Leakage Current7 @ 25°C
100
90
VSS to AVDD
100
100
150
150
10
dB min
At DC and AVDD = 5 V
dB min
At DC and AVDD = 10 V
V min to V max
dB min
dB min
dB min
dB min
For Filter Notches of 10, 25, 50 Hz, ± 0.02 × fNOTCH
For Filter Notches of 10, 30, 60 Hz, ± 0.02 × fNOTCH
For Filter Notches of 10, 25, 50 Hz, ± 0.02 × fNOTCH
For Filter Notches of 10, 30, 60 Hz, ± 0.02 × fNOTCH
pA max
TMIN to TMAX
Sampling Capacitance7
Analog Inputs8
Input Voltage Range9
Input Sampling Rate, fS
Reference Inputs
REF IN(+) – REF IN(–) Voltage11
1
20
0 to +VREF10
± VREF
See Table III
2.5 to 5
nA max
pF max
nom
nom
For Normal Operation. Depends on Gain Selected
Unipolar Input Range (B/U Bit of Control Register = 1)
Bipolar Input Range (B/U Bit of Control Register = 0)
V min to V max For Specified Performance. Part Is Functional with
Input Sampling Rate, fS
fCLK IN/256
Lower VREF Voltages
NOTES
1Temperature ranges are as follows: A Version, –40°C to +85°C; S Version, –55°C to +125°C. See also Note 16.
2Applies after calibration at the temperature of interest.
3Positive full-scale error applies to both unipolar and bipolar input ranges.
4These errors will be of the order of the output noise of the part as shown in Table I after system calibration. These errors will be 20 µV typical after self-calibration
or background calibration.
5Recalibration at any temperature or use of the background calibration mode will remove these drift errors.
6This common-mode voltage range is allowed, provided that the input voltage on AIN(+) and AIN(–) does not exceed AV DD + 30 mV and VSS – 30 mV.
7These numbers are guaranteed by design and/or characterization.
8The analog inputs present a very high impedance dynamic load that varies with clock frequency and input sample rate. The maximum recommended source
resistance depends on the selected gain (see Tables IV and V).
9The analog input voltage range on the AIN1(+) and AIN2(+) inputs is given here with respect to the voltage on the AIN1(–) and AIN2(–) inputs. The absolute
voltage on the analog inputs should not go more positive than AVDD + 30 mV or go more negative than VSS – 30 mV.
10VREF = REF IN(+) – REF IN(–).
11The reference input voltage range may be restricted by the input voltage range requirement on the VBIAS input.
–2–
REV. G
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