ADVANCED COMMUNICATIONS & SENSING
3.4. Receiver Description
The SX1211 is set to receive mode when MCParam_Chip_mode = 011.
First down-
conversion
Second down-
conversion
RSSI
LNA
LO2 Rx
OOK
demod
Bit
synchronizer
FSK
demod
LO1 Rx
SX1211
Control logic
-Pattern recognition
-FIFO handler
-SPI interface
-Packet handler
RF
IF1
Baseband, IF2 in OOK
Figure 15: Receiver Architecture
3.4.1. Architecture
The SX1211 receiver employs a super-heterodyne architecture. Here, the first IF is 1/9th of the RF frequency
(approximately 100MHz). The second down-conversion mixes the I and Q signals to base band in the case of the
FSK receiver (Zero IF) and to a low-IF (IF2) for the OOK receiver.
LO2
Rx
Second
down-conversion
First
down-conversion
0
IF2=0
in FSK
mode
IF1
≈100MHz
Second
down-conversion
Figure 16: FSK Receiver Setting
Image
frequency
LO1 Rx
Channel
Frequencyl
First
down-conversion
0
IF2<0
in FSK
mode
equal to fo
IF1
≈100MHz
LO2 Rx
Figure 17: OOK Receiver Setting
Image
frequency
LO1 Rx
Channel
Frequency
After the second down-conversion stage, the received signal is channel-select filtered and amplified to a level
adequate for demodulation. Both FSK and OOK demodulation are available. Finally, an optional Bit Synchronizer
(BitSync) is provided, to be supply a synchronous clock and data stream to a companion uC in Continuous mode,
V3.0 – august 15th, 2007
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