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STM1403A Просмотр технического описания (PDF) - STMicroelectronics

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STM1403A Datasheet PDF : 34 Pages
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STM1403
Figure 1. Logic diagram
VCCSW(2)
MR
PFI
TP1 (NH)
VREF
BLD(3) or
VTPU(1)
VBAT
VCC
STM1403
VOUT
RST(3)
PFO(3)
SAL(3)
TP2 TP3 TP4 VSS
(NL) (NH) (NL)
AI09682
Description
Note:
1. VREF only for STM1403A; VTPU for STM1403B/C.
2. Normal mode: low when VOUT is internally switched to VCC and high when VOUT is internally switched to
battery.
3. SAL, RST, PFO, and BLD are open drain.
Table 2.
Vccsw(1)
MR
Signal names
VCC switch output
Manual (push-button) reset input
PFI
Power-fail Input
TP1 - TP4
VOUT
RST(2)
PFO(2)
SAL(2)
BLD(2)
VREF(3)
VTPU(3)
VBAT
VCC
VSS
Independent physical tamper detect pins 1 through 4
Supply voltage output
Active-low reset output
Power-fail output
Security alarm output
Battery low voltage detect
1.237 V reference voltage
Tamper pull-up (VCC or VBAT)
Backup supply voltage
Supply voltage
Ground
1. Normal mode: low when VOUT is internally switched to VCC and high when VOUT is internally switched to
battery.
2. SAL, RST, PFO, and BLD are open drain.
3. VREF only for STM1403A; VTPU for STM1403B/C.
See Section 2: Pin descriptions on page 11 for details.
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