SST58LD016 Просмотр технического описания (PDF) - Silicon Storage Technology

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SST58LD016

ATA-Disk Chip

Silicon Storage Technology 

ATA-Disk Chip

SST58SD008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192

SST58LD008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192

Data Sheet

2.3.7 I/O Output (Write) Timing Specification

TABLE 2-7: I/O WRITE TIMING

Item

Data Setup before IOWR#

Data Hold following IOWR#

IOWR# Width Time

Address Setup before IOWR#

Address Hold following IOWR#

IOCS16 Delay Falling from Address

IOCS16 Delay Rising from Address

Symbol

tsu(IOWR)

th(IOWR)

tw(IOWR)

tsuA(IOWR)

thA(IOWR)

tdfIOCS16(ADR)

tdrIOCS16(ADR)

IEEE Symbol

tDVIWH

tlWHDX

tlWLIWH

tAVIWL

tlWHAX

tAVISL

tAVISH

Note: All times are in nanoseconds. The maximum load on IOCS16 is 1 LSTTL with 50pF total load.

All AC specifications are guaranteed by design.

Min

Max

20

-

10

-

70

-

25

-

10

-

-

20

-

20

T2-7.4 391

Valid Address1

IOWR#

tsuA(IOWR)

tw(IOWR)

thA(IOWR)

tdrIOCS16(ADR)

IOCS16#

tdfIOCS16(ADR)

tsu(IOWR)

th(IOWR)

D15-D0

Din Valid

1. Valid Address consists of signals CS1FX#, CS3FX# and A2-A0.

FIGURE 2-3: I/O WRITE TIMING DIAGRAM

391 ILL2-8.2

VIHT

VILT

INPUT

VHT

VLT

REFERENCE POINTS

VHT

VLT

OUTPUT

391 ILL F11.0

AC test inputs are driven at VIHT (2.4V) for a logic “1” and VILT (0.4V) for a logic “0”. Measurement reference points for

inputs and outputs are VHT (2.0V) and VLT (0.8V). Input rise and fall times (10% ↔ 90%) are <10 ns.

FIGURE 2-4: AC INPUT/OUTPUT REFERENCE WAVEFORMS

Note: VHT - VHIGH Test

VLT - VLOW Test

VIHT - VINPUT HIGH Test

VILT - VINPUT LOW Test

©2001 Silicon Storage Technology, Inc.

13

S71167-05-000 9/01 391

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