Rev. 1.0
UTRON
UT62V25716(I)
256K X 16 BIT LOW POWER CMOS SRAM
DATA RETENTION CHARACTERISTICS (TA = -40℃~85℃(I))
PARAMETER
Vcc for Data Retention
Data Retention Current
Chip Disable to Data
Retention Time
Recovery Time
SYMBOL
VDR
IDR
tCDR
tR
TEST CONDITION
CE1≧VCC-0.2V or CE2≦
0.2V
Vcc=1.5V
-L
CE1 ≧ VCC-0.2V
- LL
or CE2≦0.2V
See Data Retention
Waveforms (below)
MIN.
1.5
-
-
0
5
TYP. MAX. UNIT
-
-
V
1
50 µA
0.5 15 µA
-
-
ms
-
-
ms
DATA RETENTION WAVEFORM
VCC
CE1
VSS
CE2
tCDR
VIH
VIL
Date Retention Mode
VDR ≧ 1.5V
CE1 ≧ VCC -0.2V
CE2 ≤ 0.2V
4.5
tR
VIH
VIL
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
6
P80066