SC9351 Просмотр технического описания (PDF) - Silan Microelectronics

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SC9351

AUDIO SYSTEM CONTROL MCU

Silan Microelectronics 

SC9351

external interrupt, RTC interrupt will generate interrupt request instead of reset signal.

‹ Power-on reset by connecting resistor, capacitor or external keypress reset by connecting reset key

to pin nRST are both available.

‹ LDO low-voltage detect signal can reset MCU and has no effect on RTC.

‹ WDT overflow reset can reset CPU and has no effect on LDO, RTC, clock system, operating mode

control module and interrupt extension module, etc.

4.3 Interrupt

There are 18 interrupt sources in SC9351 except for reset signals. These interrupt sources enter interrupt

processing module through five channels same as 8051.

Five interrupts of S51 are supported: INT0, INT1, TF0, TF1, TI/RI, where, INT0 is extended to 4 external

interrupts, INT1 (internal interrupt extended) is shared by various internal modules (such as I2C and SPI), and

TI/RI interrupt channel is corresponding to transmitting/receiving interrupt of two UARTs. High-level trigged

interrupts TF0 and TF1 separately belong to timer/counter0 and timer/counter1 of 8051.

Priority and mask function setting for external/internal interrupts extended is independent and software inquiry

should be used by interrupt routine due to external/internal interrupts extended share one interrupt entry. (For

example, interrupt source register should be checked to make sure which pin triggers the interrupt after INT0

responds to interrupt.)

External 4 interrupts are from pin P1.6/P1.7/P2.4/P2.5, which can be programmable as rising-edge or falling-

edge trigger, and share the entry address 0003H corresponding to INT0 of 8051. Each interrupt source can be

set to a corresponding priority (0~7), which is different according to different sources. And CPU only responses to

the interrupt request with PRI (bigger number for higher PRI) higher than the setting value of interrupt control

register (ICR). The execution of interrupt service routine with low PRI will not be broken by the interrupt with high

PRI which will be responded after the low PRI interrupt is completed due to these interrupts share the same

degree of CPU. The interrupts can be responded as long as the interrupt flag is active, so external interrupts will

not be lost.

Internal interrupts of SC9351 are mainly from its embedded digital and analog modules including I2C, SPI, ADC,

T2, T3 and RTC, etc., and share the entry address 0013H corresponding to INT1 of 8051.

When serial interrupt is processed, RI and TI requests of UART0 share TI of 8051, while RI and TI requests of

UART1 share RI of 8051 due to there are two UARTs in SC9351. The interrupt source is decided by inquiring

corresponding flag and the flag RI/TI is cleared automatically by hardware after interrupt response.

The interrupt processing of S51 is the same as that of 8051, mainly controlled by interrupt enable control register

IE and interrupt PRI register IP.

The following 3 steps must be executed to use interrupts of S51:

1. Set EA of IE register to 1

2. Set corresponding interrupt enable bit to 1

3. After interrupt is triggered, program pointer jumps to corresponding vector address and interrupt

service routine starts to be executed.

HANGZHOU SILAN MICROELECTRONICS CO.,LTD

Http: //www.silan.com.cn

REV:1.0 2009.02.16

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