SC2441AEVB Просмотр технического описания (PDF) - Semtech Corporation

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SC2441AEVB

1.8V to 20V Input 2-Phase Synchronous Step-down Controllers with Step-up Converter

Semtech Corporation 

SC2441A

POWER MANAGEMENT

Operation (Cont.)

In closed loop operation, EA1 and EA2 output voltage

vary from 1.2V to 3.5V with the range 1.2V to 1.85V

corresponding to negative peak sense voltages. Both gate

drives are kept off until the COMP voltage exceeds 1.85V

in start up.

during start up. As mentioned above, there is no PWM

(=TGON) pulse until CSS is above 1.25V and the

corresponding COMP rises above 1.85V. Once the first

TGON pulse appears, L2 is reset and both gate drivers of

that channel are enabled.

The error amplifier of the step-up converter has a 1.25V

reference voltage. Its output voltage excursion is from 0.8V

to 1V in closed-loop operation.

Current-Limit

The 25mV maximum current sense voltage is the cycle-by-

cycle peak current limit of the step-down controller.

Gate Drivers

The SC2441A uses an adaptive non-overlapping control

scheme to switch the upper and the synchronous

MOSFETs. The synchronous MOSFET of each step-down

channel is turned off at the falling-edge of the phase

clock. The control (upper) MOSFET is not turned on until

the synchronous gate drive goes low. The phase inductor

current ramps up. When the sensed inductor current

reaches the threshold determined by the error amplifier

output and ramp compensation, the control MOSFET is

turned off. The synchronous MOSFET is not turned on

until the upper gate drive goes low.

The supply voltage for the upper gate driver is obtained

from a diode-capacitor bootstrap circuit. If the bootstrap

capacitor is charged from VCC, then the high-side gate drive

voltage will swing from approximately 2V to ground. The

CC

synchronous gate drive swings from V to ground.

CC

Soft-Start and Overload Protection

After CSS is charged above 3.3V, C1 output goes low.

Hiccup is armed. If the output voltage is less than 70%

of the set value due to improper start up or output

overload, then C3 will set the overload latch L1. Both gate

drivers of the channel are turned off and the 10µA

current source discharges CSS. RSS must be large enough

to ensure full discharge of CSS down to 0.5V. Soft-start

process should be slow enough to allow the output to

reach 70% of its final value before hiccup is armed. The

overload latch L1 is reset when the CSS capacitor is

discharged below 0.5V. The 10µA current source turns

off. CSS capacitor is recharged by RSS and the converter

undergoes soft-start. If overload persists, the step-down

converters will undergo repetitive shutdown and restart

(hiccup).

If the output is short-circuited, the inductor current will

not increase indefinitely between the times the inductor

current reaching its current limit and shutdown. This is

due to cycle skipping reduces the actual operating

frequency.

Pulling the SS/EN pin below 0.8V with an open-collector

transistor sets the disable latch L2 and turns off the gate

drives. The SS/EN pin can be used as the enable input for

the controller.

The soft start timing diagram and the hiccup operation

timing diagram are shown in Figures 6a and 6b

respectively.

Figure 4 shows the functional diagram of the soft-start

and overload protection circuit. The soft-start capacitor

CSS and its charging resistor RSS are tied to the SS/EN pin.

Together they set the soft-start time. Before V rises to

CC

4.5V, the undervoltage lockout circuit discharges C to

SS

ground. After VCC rises above 4.5V, Q1 turns off and CSS is

slowly charged by RSS. Comparator C2 and latch L2 first

disable both the upper and lower gate drives. Hysteretic

comparator C resets the latch L so that hiccup is disabled

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 2006 Semtech Corp.

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