S3C72B5 Просмотр технического описания (PDF) - Samsung

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S3C72B5

The S3C72B5/C72B7/C72B9 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47

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ELECTRICAL DATA

S3C72B5/C72B7/C72B9/P72B9

Table 15-2. D.C. Electrical Characteristics (Concluded)

(TA = – 40 °C to + 85 °C, VDD = 1.8 V to 5.5 V)

Parameter Symbol

Conditions

Min

Typ

Max

Units

Supply

IDD1 (2) VDD = 5 V ± 10%

6.0 MHz

–

Current (1)

Crystal oscillator

4.19 MHz

C1 = C2 = 22 pF

3.9

8.0

mA

2.9

5.5

VDD = 3 V ± 10%

IDD2 (2)

Idle mode

VDD = 5 V ± 10%

Crystal oscillator

C1 = C2 = 22 pF

6.0 MHz

4.19 MHz

6.0 MHz

4.19 MHz

1.8

4.0

1.3

3.0

1.3

2.5

1.2

1.8

VDD = 3 V ± 10%

6.0 MHz

4.19 MHz

0.5

1.5

0.44

1.0

IDD3 (3)

IDD4 (3)

VDD = 3 V ± 10%

32 kHz crystal oscillator

Idle mode; VDD = 3 V ± 10%

32 kHz crystal oscillator

–

15.3

30

µA

6.4

15

IDD5

Stop mode;

VDD = 5 V ± 10%

Stop mode;

VDD = 3 V ± 10%

SCMOD =

0000B

XTin = 0V

2.5

5

0.5

3

VDD = 5 V ± 10%

VDD = 3 V ± 10%

SCMOD =

0100B

0.2

3

0.1

2

NOTES:

1. Currents in the following circuits are not included; on-chip pull-up resistors, internal LCD voltage dividing resistors,

output port drive currents.

2. Data includes power consumption for subsystem clock oscillation.

3. When the system clock control register, SCMOD, is set to 1001B, main system clock oscillation stops and the

subsystem clock is used.

4. Every values in this table is measured when the power control register (PCON) is set to "0011B".

15-4

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