S3C7238 Просмотр технического описания (PDF) - Samsung

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S3C7238

The S3C7238/C7235 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47

Samsung 

ELECTRICAL DATA

S3C7238/P7238/C7235/P7235

CPU Clock

1.5 MHz

1.0475 MHz

1.00 MHz

750 kHz

500 kHz

250 kHz

Main OSC. Frequency

6 MHz

4.19 MHz

3 MHz

15.6 kHz

1 1.8

3

4

5

6

7

Supply Voltage (V)

CPU CLOCK = 1/n x oscillator frequency (n = 4, 8, 64)

Figure 14-1. Standard Operating Voltage Range

Table 14-7. RAM Data Retention Supply Voltage in Stop Mode

(TA = – 40 °C to + 85 °C)

Parameter

Data retention supply voltage

Data retention supply current

Release signal set time

Oscillator stabilization wait

time (1)

Symbol

VDDDR

IDDDR

tSREL

tWAIT

Conditions

Normal operation

VDDDR = 1.8 V

Normal operation

Released by RESET

Released by interrupt

Min

Typ

Max

Unit

1.8

–

6.5

V

–

0.1

10

µA

0

–

–

µs

–

217/fx

–

ms

–

(2)

–

NOTES:

1. During oscillator stabilization wait time, all CPU operations must be stopped to avoid instability during oscillator

start-up.

2. Use the basic timer mode register (BMOD) interval timer to delay execution of CPU instructions during the wait time.

14-8

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