S3C8639 Просмотр технического описания (PDF) - Samsung

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S3C8639

8-bit single-chip CMOS microcontrollers

Samsung 

ADDRESS SPACES

S3C8639/C863A/P863A/C8647/F8647

REGISTER PAGE POINTER (PP)

The SAM8 architecture supports the logical expansion of the physical 256-byte internal register file (which use an

8-bit data bus) to as many as 16 separately addressable register pages. Page addressing is controlled by the

register page pointer (PP, DFH). Two logical pages are implemented in S3C8639/C863A/C8647. These pages

are used as general purpose register space.

MSB .7

Register Page Pointer (PP)

DFH, Set 1, R/W

.6 .5 .4 .3 .2 .1

.0 LSB

Destination register page seleciton bits:

0000B

0001B

0010B

0011B

0100B

Destination: page 0

Destination: page 1

Destination: page 2 (Not used for the S3C8647)

Destination: page 3 (Not used for the S3C8639)

Not used for the S3C8639/C863A/C8647

1 1 1 1 B Not used for the S3C8639/C863A/C8647

Source register page selection bits:

0000B

0001B

0010B

0011B

0100B

Source: page 0

Source: page 1

Source: page 2 (Not used for the S3C8647)

Source: page 3 (Not used for the S3C8639)

Not used for the S3C8639/C863A/C8647

1 1 1 1 B Not used for the S3C8639/C863A/C8647

Figure 2-4. Register Page Pointer (PP)

REGISTER SET 1

The term set 1 refers to the upper 64 bytes of the register file, locations C0H–FFH. The upper 32-byte area of

this 64-byte space (E0H–FFH) is divided into two 32-byte register banks, bank 0 and bank 1. You execute the set

register bank instructions SB0 or SB1 to address one bank or the other. Bank 0 is automatically selected by a

reset operation.

In S3C8639/C863A, register locations of only E0H–F4H are addressable in the bank 1 area; the remaining

locations (F5H–FFH) are not mapped. The lower 32-byte area of set 1 is not banked and can be addressed at

any time. It contains 16 mapped system registers (D0H–DFH) and a 16-byte “scratch” area (C0H–CFH) for

working register addressing.

Registers in set 1 are directly accessible at all times using Register addressing mode. The 16-byte working

register area can only be accessed using working register addressing. (For more information about working

register addressing, please refer to Chapter 3, “Addressing Modes.”)

REGISTER SET 2

The same 64-byte physical space that is used for set 1 register locations C0H–FFH is logically duplicated to add

another 64 bytes of space. This expanded area of the register file is called set 2. All set 2 locations (C0H–FFH)

can be addressed in all page of the S3C8639/C863A register space.

The logical division of set 1 and set 2 is maintained by means of addressing mode. In order to access set 1, you

should use resister addressing mode. When you want to access register locations in set 2, you have to select

Register Indirect addressing mode or Indexed addressing mode access register locations in set 2.

2-6

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