S3C1860 Просмотр технического описания (PDF) - Samsung

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производитель

S3C1860

4-bit single-chip CMOS microcontroller

Samsung 

S3C1840

RESET

All reset operations are internal in the S3C1840. It has an internal power-on reset circuit consisting of a 7 pF

capacitor and a 1 MΩ resistor (See Figure 1-18). The controller also contains an auto-reset circuit that resets the

chip every 131,072 oscillator clock cycles (288 ms at a fxx = 455 kHz clock frequency). The auto-reset counter is

cleared by the rising edge of a internal P2.0 pin, by HALT, or by the power-on reset pulse (See Figure 1-19).

Therefore, no clocks are sent to the counter and the time-out is suspended in HALT mode. When a reset occurs

during program execution, a transient condition occurs. The PA register is immediately initialized to 0FH. The

PC, however, is not reset to 0H until one instruction cycle later. For example, if PC is 1AH when a reset pulse is

generated, the instruction at 0F1AH is executed, followed by the instruction at 0F00H.

After a reset, approximately 13 msec is needed before program execution proceeds (assuming fxx = 455 kHz

ceramic oscillation).

Upon initialization, registers are set as follows:

• PC register to 0 in next instruction cycle

• PA and PB registers to 0FH (15th page)

• SF and SL registers to 1

• HL registers to unknown state

• All internal/external output pins (P3.0-P3.3, P2.0/REM-P2.6, P2.9, P2.10, P2.12 and P2.13) to low.

VDD

S3C1840

7 pF

1 MΩ

VSS

Figure 1-18. S3C1840's Power-on Reset Circuit

1-17

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