RT8100 Просмотр технического описания (PDF) - Richtek Technology
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RT8100 Datasheet PDF : 18 Pages
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RT8100
Preliminary
Application Information
Current Sense, Ramp Setting
RT8100 senses the inductor current through inductor DCR
and feeds the current signal back to the control loop. The
current sensing circuitry, as in Figure 5 consists of an RC
filter, a current sensing GM together with two external
resistors. The current flowing the inductor as well as the
DCR causes a ripple voltage proportional to inductor ripple
current across the equivalent inductor DCR as in Figure 5,
The ripple voltage can be obtained using an RC filter in
parallel with the inductor, if the component values satisfy
the following relationships.
L
DCR
R
C
The external resistor RR is used to sets the internal ramp
voltage proportional to current. The simulated ramp voltage
is also used to implement the slope compensation set
together using a single resistor RR. The relationships
between RR and the internal voltage ramp is :
( VIN − VOUT + k VOUT ) DCR 15k
L
L RCSN
= VIN − VRR ÷ 64p
RR
RR
=
(VIN
−
VRR
)
x
R CSN
64p
÷ ( VIN − VOUT + k VOUT ) ÷ DCR
L
L
15k
CSP(Pin)
GM+
-
CSN(Pin) RCSN
IX
RDC
Figure 5
L
DCR
=R
x
C
The current sense GM converts the voltage drop on the
capacitor in the DCR sensing network together with the
resistor RCSN connected from the VOUT to the CSN pin.
RCSN defines the trans-conductance of the GM stage. An
extra external resistor connected from RCSN to GND is
recommended to offer the capability of sensing negative
inductor current in applications where negative currents
are possible at light load conditions. The sensed current
Ix is :
IX
=
IL ×DCR
RCSN
+
VOUT
RDC
, at steady state.
IX
=
IL ×DCR
RCSN
, provided RDC is left opened.
The valley of the sensed current Ix is sampled and held
and converted to a DC voltage as a baseline of the current
feedback ramp.
Where
VRR: the voltage at RR pin to 0.5V
RR : the resistance at RR pin
k : the slope compensation coefficient, which is the ratio
of the desired compensation slope to the down ramp slope.
The ramp voltage is summed up with the sensed baseline
voltage to form a complete current feedback signal. The
simulated ramp signal is fed to the comparator of the PWM
modulator, comparing with error amplifier output to generate
PWM pulses.
Gate Control
a. Before SS signal reach the bottom of the ramp voltage,
UGATE and LGATE will be off.
b. If PI pin is pulled low UGATE and LGATE will be off.
c. When OC function occurs a constant current of 10μA
starts to discharge the capacitor connected to SS pin
right away. When OC occurs, UGATE and LGATE will
be off. When the voltage at the capacitor connected to
SS pin pass about 0.4V, a constant current of 10μA
starts to charge the capacitor. The PWM signal is enable
to pass to UGATE and LGATE.
d. When fault conditions occur or SS < 0.4V, the current
sense function will be disable.
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DS8100-03 August 2007
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