RT8015APQW Просмотр технического описания (PDF) - Richtek Technology
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RT8015APQW Datasheet PDF : 14 Pages
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RT8015A
impedance. To avoid the RT8015A from exceeding the
maximum junction temperature, the user will need to do
some thermal analysis. The goal of the thermal analysis
is to determine whether the power dissipated exceeds
the maximum junction temperature of the part. The
temperature rise is given by : TR = PD x θJA Where PD is
the power dissipated by the regulator and θJA is the thermal
resistance from the junction of the die to the ambient
temperature. The junction temperature, TJ, is given by :
TJ = TA + TR Where TA is the ambient temperature.
As an example, consider the RT8015A in dropout at an
input voltage of 3.3V, a load current of 2A and an ambient
temperature of 70°C. From the typical performance graph
of switch resistance, the RDS(ON) of the P-Channel switch
at 70°C is approximately 121mΩ. Therefore, power
dissipated by the part is :
PD = (ILOAD)2 (RDS(ON)) = (2A)2 (121mΩ) = 0.484W
For the DFN3x3 package, the θJA is 110°C/W. Thus the
junction temperature of the regulator is : TJ = 70°C +
(0.484W) (110°C/W) = 123.24°C Which is below the
maximum junction temperature of 125°C. Note that at
higher supply voltages, the junction temperature is lower
due to reduced switch resistance (RDS(ON)).
` Flood all unused areas on all layers with copper.
Flooding with copper will reduce the temperature rise
of powercomponents.
You can connect the copper areas to any DC net (PVDD,
VDD, VOUT, PGND, GND, or any other DC rail in your
system).
` Connect the FB pin directly to the feedback resistors.
The resistor divider must be connected between VOUT
and GND.
Figure 4
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT8015A.
` A ground plane is recommended. If a ground plane layer
is not used, the signal and power grounds should be
segregated with all small-signal components returning
to the GND pin at one point that is then connected to
the PGND pin close to the IC. The exposed pad should
be connected to GND.
` Connect the terminal of the input capacitor(s), CIN, as
close as possible to the PVDD pin. This capacitor
provides the AC current into the internal power
MOSFETs.
` LX node is with high frequency voltage swing and should
be kept within small area. Keep all sensitive small-signal
nodes away from the LX node to prevent stray capacitive
noise pick-up.
Figure 5
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DS8015A-04 March 2011
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