RF3145 Просмотр технического описания (PDF) - RF Micro Devices
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RF3145 Datasheet PDF : 18 Pages
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RF3145
The components following the power amplifier often have insertion loss variation with respect to frequency. Usually, there is
some length of microstrip following the power amplifier. There is also a frequency response found in directional couplers due to
variation in the coupling factor over frequency, as well as the sensitivity of the detector diode. Since the RF3145 does not use
a directional coupler with a diode detector, these variations do not occur.
Input impedance variation is found in most GSM power amplifiers. This is due to a device phenomena where CBE and CCB (CGS
and CSG for a FET) vary over the bias voltage. The same principle used to make varactors is present in the power amplifiers.
The junction capacitance is a function of the bias across the junction. This produces input impedance variations as the VAPC
voltage is swept. Although this could present a problem with frequency pulling the transmit VCO off frequency, most synthesizer
designers use very wide loop bandwidths to quickly compensate for frequency variations due to the load variations presented
to the VCO.
The RF3145 presents a very constant load to the VCO. This is because all stages of the RF3145 are run at constant bias. As a
result, there is constant reactance at the base emitter and base collector junction of the input stage to the power amplifier.
Noise power in PA's where output power is controlled by changing the bias voltage is often a problem when backing off of out-
put power. The reason is that the gain is changed in all stages and according to the noise formula (Equation 5),
FTOT
=
F1
+
F-----2----–-----1-
G1
+
G--F---1-3----⋅-–--G--1--2--
(Eq. 5)
the noise figure depends on noise factor and gain in all stages. Because the bias point of the RF3145 is kept constant, the
gain in the first stage is always high and the overall noise power is not increased when decreasing output power.
Power control loop stability often presents many challenges to transmitter design. Designing a proper power control loop
involves trade-offs affecting stability, transient spectrum and burst timing.
In conventional architectures, the PA gain (dB/V) varies across different power levels, and as a result the loop bandwidth also
varies. With some power amplifiers it is possible for the PA gain (control slope) to change from 100dB/V to as high as
1000dB/V. The challenge in this scenario is keeping the loop bandwidth wide enough to meet the burst mask at low slope
regions which often causes instability at high slope regions.
The RF3145 loop bandwidth is determined by internal bandwidth, and the RF output load and does not change with respect to
power levels. This makes it easier to maintain loop stability with a high bandwidth loop since the bias voltage and collector volt-
age do not vary.
An often overlooked problem in PA control loops is that a delay not only decreases loop stability, it also affects the burst timing
(for instance, when the input power from the VCO decreases (or increases) with respect to temperature or supply voltage). The
burst timing then appears to shift to the right, especially at low power levels. The RF3145 is insensitive to a change in input
power and the burst timing is constant and requires no software compensation.
Switching transients occur when the up and down ramp of the burst is not smooth enough, or suddenly changes shape. If the
control slope of a PA has an inflection point within the output power range, or if the slope is simply to steep, it is difficult to pre-
vent switching transients. Controlling the output power by changing the collector voltage is (as described earlier) based on the
physical relationship between voltage swing and output power. Furthermore all stages are kept constantly biased so inflection
points are nonexistent.
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Rev A4 DS050919
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