PIC16LC781T-ISS Просмотр технического описания (PDF) - Microchip Technology

Номер в каталоге

Компоненты Описание

производитель

PIC16LC781T-ISS

8-Bit CMOS Microcontrollers with A/D, D/A, OPAMP, Comparators and PSMC

Microchip Technology 

PIC16C781/782

2.5 INTCON Register

The INTCON register is a readable and writable regis-

ter which contains:

• Enable and interrupt flag bits for TMR0 register

overflow

• Enable and interrupt flag bits for the external

interrupt (INT)

• Enable and interrupt flag bits for PORTB

Interrupt-on-Change (IOCB)

• Peripheral interrupt enable bit

• Global interrupt enable bit

Note:

Interrupt flag bits are set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit, or the global

enable bit, GIE (INTCON<7>). User soft-

ware should ensure the appropriate inter-

rupt flag bits are clear prior to enabling an

interrupt.

REGISTER 2-3:

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

INTERRUPT CONTROL REGISTER (INTCON: 0Bh, 8Bh, 10Bh, 18Bh)

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0 R/W-0 R/W-0 R/W-x

GIE

PEIE

T01E

INTE

RBIE

T0IF

INTF

RBIF

bit 7

bit 0

GIE: Global Interrupt Enable bit

1 = Enables all unmasked interrupts

0 = Disables all interrupts

PEIE: Peripheral Interrupt Enable bit

1 = Enables all unmasked peripheral interrupts

0 = Disables all peripheral interrupts

T0IE: TMR0 Overflow Interrupt Enable bit

1 = Enables the TMR0 interrupt

0 = Disables the TMR0 interrupt

INTE: RB0/INT External Interrupt Enable bit

1 = Enables the RB0/INT external interrupt

0 = Disables the RB0/INT external interrupt

RBIE: RB Port Change Interrupt Enable bit(1)

1 = Enables the RB port change interrupt

0 = Disables the RB port change interrupt

T0IF: TMR0 Overflow Interrupt Flag bit

1 = TMR0 register has overflowed (must be cleared in software)

0 = TMR0 register did not overflow

INTF: RB0/INT External Interrupt Flag bit

1 = The RB0/INT external interrupt occurred (must be cleared in software)

0 = The RB0/INT external interrupt did not occur

RBIF: RB Port Change Interrupt Flag bit(1)

1 = When at least one of the RB7:RB0 pins changed state (must be cleared in software)

0 = None of the RB7:RB0 pins have changed state

Note 1: Individual RB pin interrupt-on-change can be enabled/disabled from the Interrupt-

on-Change PORTB register (IOCB).

Legend:

R = Readable bit

- n = Value at POR

W = Writable bit

’1’ = Bit is set

U = Unimplemented bit, read as ‘0’

’0’ = Bit is cleared x = Bit is unknown

 2001-2013 Microchip Technology Inc.

Preliminary

DS41171B-page 19

Share Link: