PG12864LRU Просмотр технического описания (PDF) - Powertip Technology
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PG12864LRU Datasheet PDF : 32 Pages
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NO.PG12864LRU-ORA-H Rev:0
2.4 Command Function
The LH155BA has a lot of commands as shown in a list of command and each command is explaned in detall as
follows.
Data codes and command codes are defined as follows and execution of commands must be made in the state of
chip select (CSB=”L”)
(For example X address)
RS D7 D6 D5 D4 D3 D2 D1 D0
e※ 0
0
0
0 AX3 AX2 AX1 AX0
Command Codes
※RS = ”0” : RAM Data Access (7-1,7-2)
RS = “1” : Register Access (7-3~7-16)
The undefined command codes are inhibited.
Data Codes
2-4.1 Data Write to Display RAM
RE RS D7 D6 D5 D4 D3 D2 D1 D0
00
Display RAM write data
The Display RAM data of 8-bit are written in the designated X and Y address.
2-4.2 Data Read to Display RAM
RE RS D7 D6 D5 D4 D3 D2 D1 D0
00
Display RAM read data
The 8-bit contents of Display RAM designated in X and Y address and read out
immediately after data are set in X and Y address, dummy read is necessary once.
2-4.3 X Address Register Set
RE RS D7 D6 D5 D4 D3 D2 D1 D0
0
1
0
0
0
0 AX3 AX2 AX1 AX0
(At the time of reset AX3~AX0 = 0H, read address : 0H)
Addresses of Display RAM’s X direction are set. The values of AX3 to AX0 are usable up to
00H-0F, but 10H-FFH are inhibited. When the register setting SEG output normal/reverse is
REF = “0”, the data of AX3~AX0 are addressed to Display RAM as they are.
When REF = “1”, the data of 0FH-(AX3~AX0)H are addressed to Display RAM.
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