HT48R06A-1(2000) Просмотр технического описания (PDF) - Holtek Semiconductor

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HT48R06A-1
(Rev.:2000)

8-Bit OTP Microcontroller

Holtek Semiconductor 

Preliminary

HT48R06A-1

be damaged once the "CALL" operates in the in-

terrupt subroutine.

Oscillator configuration

There are two oscillator circuits in the

microcontroller.

V DD

O SC1

470pF

O SC1

O SC2

fS Y S /4

O SC2

N M O S O p e n D r a in

C r y s ta l O s c illa to r

R C O s c illa to r

System oscillator

Both are designed for system clocks, namely

the RC oscillator and the Crystal oscillator,

which are determined by the ROM code option.

No matter what oscillator type is selected, the

signal provides the system clock. The HALT

mode stops the system oscillator and ignores an

external signal to conserve power.

If an RC oscillator is used, an external resistor

between OSC1 and VDD is required and the

resistance must range from 51kW to 1MW. The

system clock, divided by 4, is available on

OSC2, which can be used to synchronize exter-

nal logic. The RC oscillator provides the most

cost effective solution. However, the frequency

of oscillation may vary with VDD, tempera-

tures and the chip itself due to process varia-

tions. It is, therefore, not suitable for timing

sensitive operations where an accurate oscilla-

tor frequency is desired.

If the Crystal oscillator is used, a crystal across

OSC1 and OSC2 is needed to provide the feed-

back and phase shift required for the oscillator,

and no other external components are required.

Instead of a crystal, a resonator can also be con-

nected between OSC1 and OSC2 to get a fre-

quency reference, but two external capacitors

in OSC1 and OSC2 are required (If the oscillat-

ing frequency is less than 1MHz).

The WDT oscillator is a free running on-chip RC

oscillator, and no external components are re-

quired. Even if the system enters the power down

mode, the system clock is stopped, but the WDT

oscillator still works with a period of approxi-

mately 65ms/5V. The WDT oscillator can be dis-

abled by ROM code option to conserve power.

Watchdog timer - WDT

The clock source of WDT is implemented by a

dedicated RC oscillator (WDT oscillator) or in-

struction clock (system clock divided by 4), de-

cided by ROM code option. This timer is

designed to prevent a software malfunction or

sequence from jumping to an unknown location

with unpredictable results. The watchdog

timer can be disabled by a ROM code option. If

the watchdog timer is disabled, all the execu-

tions related to the WDT result in no operation.

Once the internal WDT oscillator (RC oscillator

with a period of 65ms/5V normally) is selected, it

is first divided by 256 (8-stage) to get the nomi-

nal time-out period of approximately

16.6ms/5V. This time-out period may vary with

temperatures, VDD and process variations. By

invoking the WDT prescaler, longer time-out

periods can be realized. Writing data to WS2,

WS1, WS0 (bit 2,1,0 of the WDTS) can give differ-

ent time-out periods. If WS2, WS1, and WS0 are

all equal to 1, the division ratio is up to 1:128, and

S y s te m C lo c k /4

W DT

O SC

ROM

C ode

O p tio n

S e le c t

8 - b it C o u n te r

W D T P r e s c a le r

7 - b it C o u n te r

8 -to -1 M U X

W S 0~W S 2

W D T T im e - o u t

Watchdog timer

12

February 25, 2000

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